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Arty A7-35 Litex bootloader seems not reacting correctly to ARP response ? #41
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Hi @Ruinland , I kind of recall the opposite condition -- if you just had the LiteX BIOS on Arty, and you tried to ping it, it wouldn't reply, and with Wireshark I saw Arty ignoring the ARP requests. But here, Arty is looking for the host, to connect via TFTP. The first thing I would do is check your host's firewall setting. On Ubuntu, you would use "ufw". Not booting after serial boot (I assume that took quite a while!) and getting stuck at "Liftoff" is probably a separate issue. The expected memory segment offsets might not be matching between LiteX and the Linux bundle json. I'd need to do some investigating to find what Litex is expecting and whether they match the offsets in the json that you linked. As I'm looking at the instructions here, it doesn't really tell you how to load the Linux image firmware, either via netboot or serial boot, right? So you had to figure it out from other places? In the case that DID work for you, did you use serialboot or netboot? |
P.S. I'm assuming you're updated the IP address of your host's ethernet port to be 192.168.100.100 correctly. It occurred to me that you might also need to bind your tftpd to this interface and not for example your wifi interface. I've found debugging tftp to be quite difficult -- even trying to figure out the right version of tftpd to install. The instructions here builds its own tftpd to make sure it has the version that it wants! Note that overall those instructions might not be compatible with the ones you are following. Anyway, the tftpd built in the timvideos instructions is nice since it spits out some debugging messages on the host side, so you can see if any connection is being made, or if you're experiencing timeouts. |
Hi, thanks for the quick reply and sorry for my late reply :-)
AFAIK, I disabled my firewall completely. And I can netboot Linux on the bitstream from Linux-on-LiteX with the same network configuration.
That's what I feel suspicious, too. Could you tell me when does the "VexRiscv_Linux.v" got generated ? So I can tracked down whether I need to change the offsets.
Sorry that I might mis-understand you (my English is not well). For netboot, basically I have a wiring setup like this : I've disabled firewall. I bring down any NICs except the USB dongle shown in the picture with the IP set to 192.168.100.100 . (basically the same as this note I've written before.) And I put stuffs in these two directories : ( 1 and 2 ) to the tftp server root. I typed : Then the LiteX bootloader loads everything it need to the address offset it wants. The problem I'm encountering is : It doesn't work. ( The ARP log above. ) If I'm not doing it correctly, is it possible that you could ELI5 me step by step a bit ?
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I dived into the wiki you pointed to, it's bringing host's atftpd up. |
Surely. |
@Ruinland I just checked the Linux example on two different Arty boards and 2 different PCs - it works fine. I'm pretty sure the network issues you're seeing are related to you local network configuration. As for the uploading over UART - I added the
Note that UART loading i very slow
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@Ruinland you can use this Slack invite to sign in to the SymbiFlow Slack channel https://join.slack.com/t/symbiflow/shared_invite/enQtNTkyMjcyNTkzOTY4LTU0MzhmYWNjOGMyMTkyNjA0MmEyMWM5OWY3ZDg5MWQ3ODlmOWQwZjk2YzBmMDBjMzkzMzNjYjkwYjAxZTMyNjQ
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Sadly, the serialboot still failed ...... (the log is appended below.) Yet could you do one thing for me ? Serial boot failed log :
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Hi @Ruinland , I don't see any evidence that your hardware is faulty. This case is much more complex than just building a bitsteam. You have both the bitstream, plus Linxu images, and they need to be in 100% agreement about "where things are" in the address space, or you get the hang that you saw. The images.json file must specify the correct offsets that agree with what was built into the LiteX bitstream. Also, the device tree information must agree (addresses of control registers). If the bitstream and the Linux image were not built together, there is a risk of mismatch. If you're using the 3 files in the example directory, then we should probably assume that they are correct with respect to the LiteX configuration, so that leaves the images.json file as the prime suspect (for the serialboot hang at Liftoff). But netboot would be much better if you could get that working. Do you have another laptop that you can plug into the ethernet switch to test if the tftp server is working? I'm sorry I missed your VexRiscV question earlier -- if you look at the .tcl file used to build top.bit (it should be in the same directory as top.bit, probably called top.tcl), there will be a line where it loads the VexRiscV Verilog. I don't think any offset information is built into that file, though. If you just want to run a VPR-generated bitstream and it doesn't need to be Linux, there are other examples that I can provide. Hopefully I can try running through this tonight, and see if I can get netboot to work. Sorry about the delay. |
Hi @Ruinland , some of the things I wrote above a wrong -- I was assuming this was like the usual LiteX build, but it's not. I see the VexRiscv Verilog is right there in the top directory, so you have no clue how it was generated -- that is true. But it is also true that I don't think it is related to the issues you're having. Also, I see Karol added an images.json file. I'll try that with serial boot and see if it works for me. |
@Ruinland , @kgugala -- I see exactly the same stall at Liftoff with serial boot, as in @Ruinland 's previous comment. I got everything from the symbiflow-examples/examples/xc7/linux_litex_demo/ directory --- I built top.bit using the Makefile, and I used the images.json and the files that it points to. |
Hi @tcal-x ,
Yes, I do use the files in the example directories (buildroot and emulator) in this repo.
Thanks for the tip. I generated top.v and the top.tcl from GitHub litex-hub/linux-on-litex-vexriscv repo (commit 4f913ce9).
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Does Litex/VexRiscv implement RISC-V debug spec with OpenOCD support ? [1] From GitHub litex-hub/litex-data-cpu-vexriscv @ commit e2a818a |
Hi @Ruinland , I'm afraid this is getting beyond my expertise. I do know VexRiscV has GDB debug support, but you need to have a There's more info at https://github.com/SpinalHDL/VexRiscv. The Litex configuration would also need to be updated to allow actual debugging on the board. I don't know how that works in detail.
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The binaries are fine, there was a bug in images.json - emulator.bin was loaded @ incorrect address. 2bc55db fixes the issue. |
@Ruinland , it works for me now, so give it another try. |
Are you sure you started UART loading? Please reset the CPU in LiteX system after you open a serial connection with litex_term. |
and remember to use |
Thanks for all kinds of help. Though being very Voodoo, I managed to sort things out . The only things I did to make serialboot work is that I used an openocd compiled from latest scratch instead of xc3sprog and the one on Arch Linux repo. And for netboot, I set my host (192.168.100.100) to be the default gateway and it suddenly works. All in all. |
Hi,
Thanks for the great project.
I just build the top.bit from examples/xc7/linux_litex_demo with pre-gen files.
And I tried Ethernet boot with the setup from LiteX wiki except changing my TFTP server port from 69 to 6069 because the bootloader suggests "Fetching from: UDP/6069" .
Yet the bootloader complains that it fails to fetch anything from my host.
The tcpdump log shows that it sent a lot of ARP request for knowing my where my host is :
I also tried the serial boot, with the default image json file from Linux-on-Litex .
Yet it doesn't work either - - nothing shows up after the bootloader's "Lift off" message.
For cross-examination, I use the bitstream from Linux-on-Litex's prebuilt repo and Ethernet boot the rootfs/kernel/dtb and emulator.bin provided by this repo ( I mean symbiflow-examples). It boots.
So I'm kinda head-spinning right now with no clues about what went wrong.
The bitstream I generated is uploaded to Google Drive since GitHub prevents me from doing so.
Thanks again for any kind of help :-)
= = = = = = = =
BTW, I just went to COSCUP and told my fellow Taiwanese about how great the FOSS FPGA toolchain could be.
After the presentation, someone pinged me that SymbiFlow could go through the whole-nine-yards with VPR now.
So I'm trying to reproduce the results and thus to update the slides.
The text was updated successfully, but these errors were encountered: