I opened an issue at m-labs/nmigen, but seems no response at there ...
so I moved to here!

A typical usage:
If I defined a signed signal:
self.slice_begin_idx = Signal(signed(5))
And try to match to a negative value

with m.Switch(self.slice_begin_idx):
    for ii in range(-3, 0):
        with m.Case(ii):
            m.d.sync += ...

Then I get:

            5'b0?11:
                ...
            5'b0?10:
                ...
            5'b00?1:
                ...

Not sure if we can add support to negative value in Switch-Case?
or any better ideas?