module top(
    input [3:0] sw,
    input clk,
    input problem1,
    output [6:0] segment,
    output [3:0] anode,
    output problem2
);

assign anode = 8'b11111110; 

seven_segment segment1 (.data(sw[3:0]), .segment(segment[6:0]));


endmodule

# # Switches
 set_property PACKAGE_PIN V17 [get_ports { sw[0] }]; 
 set_property IOSTANDARD LVCMOS33 [get_ports { sw[0] }]; 

 set_property PACKAGE_PIN V16 [get_ports { sw[1] }]; 
 set_property IOSTANDARD LVCMOS33 [get_ports { sw[1] }];
 set_property PACKAGE_PIN W16 [get_ports { sw[2] }]; 
 set_property IOSTANDARD LVCMOS33 [get_ports { sw[2] }];
 set_property PACKAGE_PIN W17 [get_ports { sw[3] }]; 
 set_property IOSTANDARD LVCMOS33 [get_ports { sw[3] }];

 # Seven-Segment Display
 set_property PACKAGE_PIN W7 [get_ports { segment[0] }]; 
 set_property PACKAGE_PIN W6 [get_ports { segment[1] }]; 
 set_property PACKAGE_PIN U8 [get_ports { segment[2] }]; 
 set_property PACKAGE_PIN V8 [get_ports { segment[3] }]; 
 set_property PACKAGE_PIN U5 [get_ports { segment[4] }]; 
 set_property PACKAGE_PIN V5 [get_ports { segment[5] }]; 
 set_property PACKAGE_PIN U7 [get_ports { segment[6] }]; 

set_property IOSTANDARD LVCMOS33 [get_ports { segment[0] }];
set_property IOSTANDARD LVCMOS33 [get_ports { segment[1] }];
set_property IOSTANDARD LVCMOS33 [get_ports { segment[2] }];
set_property IOSTANDARD LVCMOS33 [get_ports { segment[3] }];
set_property IOSTANDARD LVCMOS33 [get_ports { segment[4] }];
set_property IOSTANDARD LVCMOS33 [get_ports { segment[5] }];
set_property IOSTANDARD LVCMOS33 [get_ports { segment[6] }];


 # Anodes
 set_property PACKAGE_PIN U2 [get_ports { anode[0] }]; 
 set_property PACKAGE_PIN U4 [get_ports { anode[1] }]; 
 set_property PACKAGE_PIN V4 [get_ports { anode[2] }]; 
 set_property PACKAGE_PIN W4 [get_ports { anode[3] }]; 

set_property IOSTANDARD LVCMOS33 [get_ports { anode[0] }];
set_property IOSTANDARD LVCMOS33 [get_ports { anode[1] }];
set_property IOSTANDARD LVCMOS33 [get_ports { anode[2] }];
set_property IOSTANDARD LVCMOS33 [get_ports { anode[3] }];