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Nexys4DDR: I/O standard should be different for some switches #176

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neuschaefer opened this issue Aug 1, 2021 · 2 comments · Fixed by #179
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Nexys4DDR: I/O standard should be different for some switches #176

neuschaefer opened this issue Aug 1, 2021 · 2 comments · Fixed by #179
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@neuschaefer
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On the Nexys4DDR board, two of the 16 slide switches (SW8/T8, SW9/U8) are connected to 1.8V rather than 3.3V:

nexys-sw

This is currently not reflected in the board definition, but probably should be.
@whitequark whitequark added the bug label Aug 1, 2021
@whitequark
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Would you be willing to send a PR? Here is an example of how to use SwitchResources with two different IO standards: https://github.com/nmigen/nmigen-boards/blob/6bbd2dd89f78f38f11ec497e34d4cddf8aae88dc/nmigen_boards/ecp5_5g_evn.py#L58-L61

@neuschaefer
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Yes, will do. Thanks for the guidance.

@neuschaefer neuschaefer mentioned this issue Aug 12, 2021
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nexys3ddr: Fix I/O voltage for SW8 and SW9 neuschaefer/amaranth-boards
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@whitequark @neuschaefer