bios: more DDR diagnostic functions

Sebastien Bourdeauducq · Sebastien Bourdeauducq · commit 7ecfd603685e · 2012-05-14T20:07:57.000+02:00
diff --git a/software/bios/ddrinit.c b/software/bios/ddrinit.c
@@ -81,6 +81,43 @@ static void init_sequence(void)
 	cdelay(200);
 }
 
+void ddrsw(void)
+{
+	CSR_DFII_CONTROL = DFII_CONTROL_CKE;
+	printf("DDR now under software control\n");
+}
+
+void ddrhw(void)
+{
+	CSR_DFII_CONTROL = DFII_CONTROL_SEL|DFII_CONTROL_CKE;
+	printf("DDR now under hardware control\n");
+}
+
+void ddrrow(char *_row)
+{
+	char *c;
+	unsigned int row;
+	
+	if(*_row == 0) {
+		setaddr(0x0000);
+		CSR_DFII_BA_P0 = 0;
+		CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS;
+		cdelay(15);
+		printf("Precharged\n");
+	} else {
+		row = strtoul(_row, &c, 0);
+		if(*c != 0) {
+			printf("incorrect row\n");
+			return;
+		}
+		setaddr(row);
+		CSR_DFII_BA_P0 = 0;
+		CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_CS;
+		cdelay(15);
+		printf("Activated row %d\n", row);
+	}
+}
+
 void ddrrd(char *startaddr)
 {
 	char *c;
@@ -141,10 +178,5 @@ int ddrinit(void)
 	
 	init_sequence();
 	
-	setaddr(0x0000);
-	CSR_DFII_BA_P0 = 0;
-	CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_CS;
-	cdelay(15);
-	
 	return 1;
 }
diff --git a/software/bios/ddrinit.h b/software/bios/ddrinit.h
@@ -19,6 +19,9 @@
 #define __DDRINIT_H
 
 int ddrinit(void);
+void ddrsw(void);
+void ddrhw(void);
+void ddrrow(char *_row);
 void ddrrd(char *startaddr);
 void ddrwr(char *startaddr);
 
diff --git a/software/bios/main.c b/software/bios/main.c
@@ -353,6 +353,9 @@ static void do_command(char *c)
 	else if(strcmp(token, "wcsr") == 0) wcsr(get_token(&c), get_token(&c));
 	
 	else if(strcmp(token, "ddrinit") == 0) ddrinit();
+	else if(strcmp(token, "ddrrow") == 0) ddrrow(get_token(&c));
+	else if(strcmp(token, "ddrsw") == 0) ddrsw();
+	else if(strcmp(token, "ddrhw") == 0) ddrhw();
 	else if(strcmp(token, "ddrrd") == 0) ddrrd(get_token(&c));
 	else if(strcmp(token, "ddrwr") == 0) ddrwr(get_token(&c));
 
