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base repository: m-labs/misoc
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head repository: m-labs/misoc
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compare: e4de5a0c9dbd
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  • 3 commits
  • 41 files changed
  • 1 contributor

Commits on Feb 27, 2015

  1. liteeth: move doc

    enjoy-digital committed Feb 27, 2015
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    617bc70 View commit details
  2. gensoc: add check_cpu_memory_region and check_csr_region to detect cs…

    …r and mem regions conflicts
    enjoy-digital committed Feb 27, 2015
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    77a6f58 View commit details
  3. make.py: avoid some actions in make all (do not flash if load-bitstre…

    …am is specified or if bios is in blockram)
    enjoy-digital committed Feb 27, 2015
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    e4de5a0 View commit details
Showing with 36 additions and 19 deletions.
  1. +23 −18 make.py
  2. +12 −0 misoclib/gensoc/__init__.py
  3. 0 misoclib/{ → liteeth}/doc/.gitignore
  4. 0 misoclib/{ → liteeth}/doc/Makefile
  5. 0 misoclib/{ → liteeth}/doc/make.bat
  6. BIN misoclib/{ → liteeth}/doc/source/_static/LiteEth_logo_full.png
  7. 0 misoclib/{ → liteeth}/doc/source/_static/LiteEth_logo_full.svg
  8. 0 misoclib/{ → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/__init__.py
  9. 0 misoclib/{ → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/breadcrumbs.html
  10. 0 misoclib/{ → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/footer.html
  11. 0 misoclib/{ → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/layout.html
  12. 0 misoclib/{ → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/layout_old.html
  13. 0 misoclib/{ → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/search.html
  14. 0 misoclib/{ → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/searchbox.html
  15. 0 misoclib/{ → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/static/css/badge_only.css
  16. 0 ...teeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/static/css/theme - prior to centering.css
  17. 0 misoclib/{ → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/static/css/theme.css
  18. BIN ... → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/static/fonts/fontawesome-webfont.eot
  19. 0 ... → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/static/fonts/fontawesome-webfont.svg
  20. BIN ... → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/static/fonts/fontawesome-webfont.ttf
  21. BIN ...→ liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/static/fonts/fontawesome-webfont.woff
  22. 0 misoclib/{ → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/static/js/theme.js
  23. 0 misoclib/{ → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/theme.conf
  24. 0 misoclib/{ → liteeth}/doc/source/_themes/enjoydigital_sphinx_rtd_theme/versions.html
  25. 0 misoclib/{ → liteeth}/doc/source/conf.py
  26. 0 misoclib/{ → liteeth}/doc/source/docs/core/index.rst
  27. 0 misoclib/{ → liteeth}/doc/source/docs/frontend/index.rst
  28. 0 misoclib/{ → liteeth}/doc/source/docs/getting_started/FAQ.rst
  29. 0 misoclib/{ → liteeth}/doc/source/docs/getting_started/bug_reports.rst
  30. 0 misoclib/{ → liteeth}/doc/source/docs/getting_started/downloads.rst
  31. 0 misoclib/{ → liteeth}/doc/source/docs/getting_started/index.rst
  32. 0 misoclib/{ → liteeth}/doc/source/docs/index.rst
  33. 0 misoclib/{ → liteeth}/doc/source/docs/intro/about.rst
  34. 0 misoclib/{ → liteeth}/doc/source/docs/intro/community.rst
  35. 0 misoclib/{ → liteeth}/doc/source/docs/intro/index.rst
  36. 0 misoclib/{ → liteeth}/doc/source/docs/intro/license.rst
  37. 0 misoclib/{ → liteeth}/doc/source/docs/intro/release_notes.rst
  38. 0 misoclib/{ → liteeth}/doc/source/docs/intro/talks_and_publications.rst
  39. 0 misoclib/{ → liteeth}/doc/source/home_page_layout.html
  40. 0 misoclib/{ → liteeth}/doc/source/index.rst
  41. +1 −1 targets/mlabs_video.py
41 changes: 23 additions & 18 deletions make.py
Original file line number Diff line number Diff line change
@@ -119,8 +119,10 @@ def _get_args():
actions["clean"] = True
actions["build-bitstream"] = True
actions["build-bios"] = True
actions["flash-bitstream"] = True
actions["flash-bios"] = True
if not actions["load-bitstream"]:
actions["flash-bitstream"] = True
if not hasattr(soc, "init_bios_memory"):
actions["flash-bios"] = True
if actions["build-bitstream"] and hasattr(soc, "init_bios_memory"):
actions["build-bios"] = True
if actions["build-bios"]:
@@ -188,20 +190,23 @@ def _get_args():
vns = platform.build(soc, build_name=build_name, **build_kwargs)
soc.do_exit(vns)

if actions["load-bitstream"] or actions["flash-bitstream"] or actions["flash-bios"]:
if actions["load-bitstream"]:
prog = platform.create_programmer()
if actions["load-bitstream"]:
prog.load_bitstream("build/" + build_name + platform.bitstream_ext)
if actions["flash-bitstream"]:
prog.set_flash_proxy_dir(args.flash_proxy_dir)
if prog.needs_bitreverse:
flashbit = "build/" + build_name + ".fpg"
subprocess.call(["tools/byteswap",
"build/" + build_name + ".bin",
flashbit])
else:
flashbit = "build/" + build_name + ".bin"
prog.flash(0, flashbit)
if actions["flash-bios"]:
prog.set_flash_proxy_dir(args.flash_proxy_dir)
prog.flash(soc.cpu_reset_address, "software/bios/bios.bin")
prog.load_bitstream("build/" + build_name + platform.bitstream_ext)

if actions["flash-bitstream"]:
prog = platform.create_programmer()
prog.set_flash_proxy_dir(args.flash_proxy_dir)
if prog.needs_bitreverse:
flashbit = "build/" + build_name + ".fpg"
subprocess.call(["tools/byteswap",
"build/" + build_name + ".bin",
flashbit])
else:
flashbit = "build/" + build_name + ".bin"
prog.flash(0, flashbit)

if actions["flash-bios"]:
prog = platform.create_programmer()
prog.set_flash_proxy_dir(args.flash_proxy_dir)
prog.flash(soc.cpu_reset_address, "software/bios/bios.bin")
12 changes: 12 additions & 0 deletions misoclib/gensoc/__init__.py
Original file line number Diff line number Diff line change
@@ -91,10 +91,22 @@ def add_wb_slave(self, address_decoder, interface):
raise FinalizeError
self._wb_slaves.append((address_decoder, interface))

def check_cpu_memory_region(self, name, origin):
for n, o, l in self.cpu_memory_regions:
if n == name or o == origin:
raise ValueError("Memory region conflict between {} and {}".format(n, name))

def add_cpu_memory_region(self, name, origin, length):
self.check_cpu_memory_region(name, origin)
self.cpu_memory_regions.append((name, origin, length))

def check_cpu_csr_region(self, name, origin):
for n, o, l, obj in self.cpu_csr_regions:
if n == name or o == origin:
raise ValueError("CSR region conflict between {} and {}".format(n, name))

def add_cpu_csr_region(self, name, origin, busword, obj):
self.check_cpu_csr_region(name, origin)
self.cpu_csr_regions.append((name, origin, busword, obj))

def do_finalize(self):
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2 changes: 1 addition & 1 deletion targets/mlabs_video.py
Original file line number Diff line number Diff line change
@@ -128,7 +128,7 @@ def add_vga_tig(platform, fb):

class FramebufferSoC(MiniSoC):
csr_map = {
"fb": 11,
"fb": 12,
}
csr_map.update(MiniSoC.csr_map)