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base repository: m-labs/migen
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base: f4b060f6fea1
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head repository: m-labs/migen
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compare: 3d7f9fd6850e
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  • 2 commits
  • 2 files changed
  • 1 contributor

Commits on Mar 3, 2015

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    2d6fbd7 View commit details
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    3d7f9fd View commit details
Showing with 4 additions and 4 deletions.
  1. +1 −1 mibuild/sim/server.py
  2. +3 −3 mibuild/sim/server_tb.cpp
2 changes: 1 addition & 1 deletion mibuild/sim/server.py
Original file line number Diff line number Diff line change
@@ -18,7 +18,7 @@ class PacketTooLarge(Exception):
pass

class VerilatorServer:
def __init__(self, sockaddr="simsocket"):
def __init__(self, sockaddr="/tmp/simsocket"):
self.sockaddr = sockaddr
self.socket = socket.socket(socket.AF_UNIX, socket.SOCK_SEQPACKET)
self._cleanup_file()
6 changes: 3 additions & 3 deletions mibuild/sim/server_tb.cpp
Original file line number Diff line number Diff line change
@@ -137,8 +137,8 @@ int console_service(struct sim *s)
/* console --> fpga */
SERIAL_SINK_STB = s->rx_serial_stb;
SERIAL_SINK_DATA = s->rx_serial_data;
if (s->rx_serial_stb)
s->rx_serial_presented = 1;
if (SERIAL_SINK_STB & SERIAL_SINK_ACK)
s->rx_serial_presented = s->rx_serial_stb;

return 0;
}
@@ -178,7 +178,7 @@ int main(int argc, char **argv, char **env)

struct sim s;
sim_init(&s);
sim_connect(&s, "../../migen/mibuild/sim/simsocket"); // XXX use args
sim_connect(&s, "/tmp/simsocket");

pthread_t sim_receive_thread;