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Commit 905be50

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enjoy-digitalenjoy-digital
committedMar 3, 2015
sdram: move lasmibus to core, rename crossbar to lasmixbar and move it to core, move dfi to phy
·
0.120.1
1 parent 9210272 commit 905be50

16 files changed

+16
-16
lines changed
 

Diff for: ‎misoclib/mem/sdram/core/__init__.py

+2-2
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44

55
from misoclib.mem.sdram.phy import dfii
66
from misoclib.mem.sdram.core import minicon, lasmicon
7-
from misoclib.mem.sdram.core.lasmicon.crossbar import Crossbar
7+
from misoclib.mem.sdram.core import lasmixbar
88

99
class SDRAMCore(Module, AutoCSR):
1010
def __init__(self, phy, ramcon_type, sdram_geom, sdram_timing, **kwargs):
@@ -18,7 +18,7 @@ def __init__(self, phy, ramcon_type, sdram_geom, sdram_timing, **kwargs):
1818
self.submodules.controller = controller = lasmicon.LASMIcon(phy.settings, sdram_geom, sdram_timing, **kwargs)
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self.comb += Record.connect(controller.dfi, self.dfii.slave)
2020

21-
self.submodules.crossbar = crossbar = Crossbar([controller.lasmic], controller.nrowbits)
21+
self.submodules.crossbar = crossbar = lasmixbar.LASMIxbar([controller.lasmic], controller.nrowbits)
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2323
# MINICON
2424
elif ramcon_type == "minicon":

Diff for: ‎misoclib/mem/sdram/bus/lasmibus.py renamed to ‎misoclib/mem/sdram/core/lasmibus.py

File renamed without changes.

Diff for: ‎misoclib/mem/sdram/core/lasmicon/__init__.py

+2-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
from migen.fhdl.std import *
22

3-
from misoclib.mem.sdram.bus import dfi, lasmibus
3+
from misoclib.mem.sdram.phy import dfi
4+
from misoclib.mem.sdram.core import lasmibus
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from misoclib.mem.sdram.core.lasmicon.refresher import *
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from misoclib.mem.sdram.core.lasmicon.bankmachine import *
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from misoclib.mem.sdram.core.lasmicon.multiplexer import *

Diff for: ‎misoclib/mem/sdram/core/lasmicon/crossbar.py renamed to ‎misoclib/mem/sdram/core/lasmixbar.py

+2-2
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
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from migen.genlib.record import *
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from migen.genlib.misc import optree
55

6-
from misoclib.mem.sdram.bus.lasmibus import Interface
6+
from misoclib.mem.sdram.core.lasmibus import Interface
77

88
def _getattr_all(l, attr):
99
it = iter(l)
@@ -13,7 +13,7 @@ def _getattr_all(l, attr):
1313
raise ValueError
1414
return r
1515

16-
class Crossbar(Module):
16+
class LASMIxbar(Module):
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def __init__(self, controllers, cba_shift):
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self._controllers = controllers
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self._cba_shift = cba_shift

Diff for: ‎misoclib/mem/sdram/core/minicon/__init__.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
from migen.bus import wishbone
33
from migen.genlib.fsm import FSM, NextState
44

5-
from misoclib.mem.sdram.bus import dfi as dfibus
5+
from misoclib.mem.sdram.phy import dfi as dfibus
66

77
class _AddressSlicer:
88
def __init__(self, col_a, bank_a, row_a, address_align):

Diff for: ‎misoclib/mem/sdram/bus/dfi.py renamed to ‎misoclib/mem/sdram/phy/dfi.py

File renamed without changes.

Diff for: ‎misoclib/mem/sdram/phy/dfii.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
from migen.fhdl.std import *
22
from migen.bank.description import *
33

4-
from misoclib.mem.sdram.bus import dfi
4+
from misoclib.mem.sdram.phy import dfi
55

66
class PhaseInjector(Module, AutoCSR):
77
def __init__(self, phase):

Diff for: ‎misoclib/mem/sdram/phy/gensdrphy.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@
2525
from migen.genlib.record import *
2626
from migen.fhdl.specials import *
2727

28-
from misoclib.mem.sdram.bus.dfi import *
28+
from misoclib.mem.sdram.phy.dfi import *
2929
from misoclib.mem import sdram
3030

3131
class GENSDRPHY(Module):

Diff for: ‎misoclib/mem/sdram/phy/k7ddrphy.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
from migen.fhdl.std import *
44
from migen.bank.description import *
55

6-
from misoclib.mem.sdram.bus.dfi import *
6+
from misoclib.mem.sdram.phy.dfi import *
77
from misoclib.mem import sdram
88

99
class K7DDRPHY(Module, AutoCSR):

Diff for: ‎misoclib/mem/sdram/phy/s6ddrphy.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
from migen.fhdl.std import *
1818
from migen.genlib.record import *
1919

20-
from misoclib.mem.sdram.bus.dfi import *
20+
from misoclib.mem.sdram.phy.dfi import *
2121
from misoclib.mem import sdram
2222

2323
class S6DDRPHY(Module):

Diff for: ‎misoclib/mem/sdram/test/abstract_transactions_lasmi.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
from migen.bus.transactions import *
33
from migen.sim.generic import run_simulation
44

5-
from misoclib.mem.sdram.bus import lasmibus
5+
from misoclib.mem.sdram.core import lasmibus
66

77
def my_generator(n):
88
bank = n % 4

Diff for: ‎misoclib/mem/sdram/test/bankmachine_tb.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
from migen.fhdl.std import *
22
from migen.sim.generic import run_simulation
33

4-
from misoclib.mem.sdram.bus import lasmibus
4+
from misoclib.mem.sdram.code import lasmibus
55
from misoclib.mem.sdram.core.lasmicon.bankmachine import *
66

77
from common import sdram_phy, sdram_geom, sdram_timing, CommandLogger

Diff for: ‎misoclib/mem/sdram/test/lasmicon_df_tb.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
from migen.fhdl.std import *
22
from migen.sim.generic import run_simulation
33

4-
from misoclib.mem.sdram.bus import lasmibus
4+
from misoclib.mem.sdram.core import lasmibus
55
from misoclib.mem.sdram.core.lasmicon import *
66
from misoclib.mem.sdram.frontend import dma_lasmi
77

Diff for: ‎misoclib/mem/sdram/test/lasmicon_tb.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
from migen.fhdl.std import *
22
from migen.sim.generic import run_simulation
33

4-
from misoclib.mem.sdram.bus import lasmibus
4+
from misoclib.mem.sdram.core import lasmibus
55
from misoclib.mem.sdram.core.lasmicon import *
66

77
from common import sdram_phy, sdram_geom, sdram_timing, DFILogger

Diff for: ‎misoclib/mem/sdram/test/lasmicon_wb.py

+1-1
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
from migen.bus.transactions import *
44
from migen.sim.generic import run_simulation
55

6-
from misoclib.mem.sdram.bus import lasmibus
6+
from misoclib.mem.sdram.core import lasmibus
77
from misoclib.mem.sdram.core.lasmicon import *
88
from misoclib.mem.sdram.frontend import wishbone2lasmi
99

Diff for: ‎misoclib/soc/sdram.py

-1
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,6 @@
22
from migen.bus import wishbone, csr
33
from migen.genlib.record import *
44

5-
from misoclib.mem.sdram.bus import dfi, lasmibus
65
from misoclib.mem.sdram.core import SDRAMCore
76
from misoclib.mem.sdram.frontend import memtest, wishbone2lasmi
87
from misoclib.soc import SoC, mem_decoder

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