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base repository: m-labs/misoc
base: 46020fd25303
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head repository: m-labs/misoc
compare: 6b24562eeaa6
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  • 2 commits
  • 6 files changed
  • 1 contributor

Commits on Mar 2, 2015

  1. sdram: improve memtest by adding 2 different writes/reads 

    doing only a write and read is not enough: if we reloaded a fpga with write that is not working after functional fpga, it would not trigger an error.
    @enjoy-digital
    enjoy-digital committed Mar 2, 2015
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  2. sdram: reintroduce dat_ack change (it was a small issue on wishbone w… 

    …rites (sending data 1 clock cycle too late) that was not detected by memtest)
    @enjoy-digital
    enjoy-digital committed Mar 2, 2015
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