Skip to content

Commit

Permalink
litepcie: fix asciiart in make.py
Browse files Browse the repository at this point in the history
enjoy-digital committed Apr 17, 2015
1 parent 8a822b9 commit 602eaf6
Showing 1 changed file with 4 additions and 4 deletions.
8 changes: 4 additions & 4 deletions misoclib/com/litepcie/example_designs/make.py
Original file line number Diff line number Diff line change
@@ -93,10 +93,10 @@ def _get_args():
sys.exit(1)

print("""
__ _ __ ______ __
/ / (_) /____ / __/ /_/ /
/ /__/ / __/ -_) _// __/ _ \\
/____/_/\__/\__/___/\__/_//_/
__ _ __ ___ _________
/ / (_) /____ / _ \/ ___/ _/__
/ /__/ / __/ -_) ___/ /___/ // -_)
/____/_/\__/\__/_/ \___/___/\__/
A small footprint and configurable PCIe
core powered by Migen

0 comments on commit 602eaf6

Please sign in to comment.