Skip to content

Commit

Permalink
rtio: add rtlink definition (currently unused)
Browse files Browse the repository at this point in the history
sbourdeauducq committed Apr 13, 2015
1 parent 07b8e12 commit ff9a772
Showing 1 changed file with 62 additions and 0 deletions.
62 changes: 62 additions & 0 deletions artiq/gateware/rtio/rtlink.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,62 @@
from migen.fhdl.std import *


class OInterface:
def __init__(self, data_width, address_width=0,
fine_ts_width=0, latency=1, suppress_nop=True):
self.stb = Signal()
self.busy = Signal()

if data_width:
self.data = Signal(data_width)
if address_width:
self.address = Signal(address_width)
if fine_ts_width:
self.fine_ts = Signal(fine_ts_width)

self.latency = latency
self.suppress_nop = suppress_nop


class IInterface:
def __init__(self, data_width,
timestamped=True, fine_ts_width=0, latency=2):
self.stb = Signal()

if data_width:
self.data = Signal(data_width)
if fine_ts_width:
self.fine_ts = Signal(fine_ts_width)

self.latency = latency
self.timestamped = timestamped
assert(not fine_ts_width or timestamped)


class Interface:
def __init__(self, o, i=None):
self.o = o
self.i = i


def _get_or_zero(interface, attr):
if isinstance(interface, Interface):
return max(_get_or_zero(interface.i, attr),
_get_or_zero(interface.o, attr))
else:
if hasattr(interface, attr):
return flen(getattr(interface, attr))
else:
return 0


def get_data_width(interface):
return _get_or_zero(interface, "data")


def get_address_width(interface):
return _get_or_zero(interface, "address")


def get_fine_ts_width(interface):
return _get_or_zero(interface, "fine_ts")

0 comments on commit ff9a772

Please sign in to comment.