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base repository: m-labs/artiq
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head repository: m-labs/artiq
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compare: 5805240df6f4
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  • 2 commits
  • 2 files changed
  • 2 contributors

Commits on Apr 17, 2015

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    af6a8f6 View commit details
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Showing with 6 additions and 3 deletions.
  1. +1 −0 .gitignore
  2. +5 −3 doc/manual/installing.rst
1 change: 1 addition & 0 deletions .gitignore
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@@ -1,6 +1,7 @@
__pycache__
*.o
*.d
*.a
*.bin
*.elf
*.fbi
8 changes: 5 additions & 3 deletions doc/manual/installing.rst
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@@ -106,10 +106,12 @@ These steps are required to generate bitstream (``.bit``) files, build the MiSoC

* Then, build and flash the ARTIQ runtime: ::

$ cd ~/artiq-dev/artiq/soc/runtime
$ make flash
$ cd ~/artiq-dev/artiq/soc/runtime && make runtime.fbi
$ ~/artiq-dev/artiq/artiq/frontend/artiq_flash.sh -t ppro -d $PWD -r

Check that the board boots by running a serial terminal program (you may need to press its FPGA reconfiguration button or power-cycle it to load the bitstream that was newly written into the flash): ::
.. note:: The `-t` option specifies the board your are targeting. Available options are `ppro` for Papilio Pro, `kc705` for KC705 and `pipistrello` for Pipistrello.

* Check that the board boots by running a serial terminal program (you may need to press its FPGA reconfiguration button or power-cycle it to load the bitstream that was newly written into the flash): ::

$ make -C ~/artiq-dev/misoc/tools # do only once
$ ~/artiq-dev/misoc/tools/flterm --port /dev/ttyUSB1