artiq_flash: drop redundant instruction, tweak doc

jordens · jordens · commit 358ad2e92711 · 2016-01-06T11:24:05.000-07:00
diff --git a/artiq/frontend/artiq_flash.py b/artiq/frontend/artiq_flash.py
@@ -33,10 +33,6 @@ def main():
       'sudo cp openocd/contrib/99-openocd.rules /etc/udev/rules.d'
       and replug the device. Ensure you are member of the
       plugdev group: 'sudo adduser $USER plugdev' and re-login.
-    * Make the matching proxy bitstream accessible in ~/.migen or
-      /usr/local/share/migen or /usr/share/migen. Proxy bitstreams are
-      published at https://github.com/jordens/bscan_spi_bitstreams.
-      This script will tell you which one is needed.
 """)
     parser.add_argument("-t", "--target", default="kc705",
                         help="target board, default: %(default)s")
diff --git a/doc/manual/installing.rst b/doc/manual/installing.rst
@@ -207,7 +207,7 @@ These steps are required to generate bitstream (``.bit``) files, build the MiSoC
             $ wget https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/master/bscan_spi_xc7k325t.bit
             $ wget https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/master/bscan_spi_xc6slx45.bit
 
-        Then copy both files ``~/artiq-dev/bscan_spi_xc6slx45.bit`` and ``~/artiq-dev/bscan_spi_xc7k325t.bit`` to ``~/.migen``, ``/usr/local/share/migen``, or ``/usr/share/migen``.
+        Then move both files ``~/artiq-dev/bscan_spi_xc6slx45.bit`` and ``~/artiq-dev/bscan_spi_xc7k325t.bit`` to ``~/.migen``, ``/usr/local/share/migen``, or ``/usr/share/migen``.
 
 
 * Download and install MiSoC: ::
