m-labs · Jan 10, 2016 · Jan 10, 2016 · Jan 10, 2016
Showing with 18 additions and 18 deletions.

+7 −2 artiq/compiler/types.py

+7 −1 artiq/compiler/validators/escape.py

+0 −8 artiq/coredevice/core.py

+4 −0 artiq/coredevice/exceptions.py

+0 −6 artiq/runtime/ksupport.c

+0 −1 artiq/runtime/ksupport.h
diff --git a/artiq/compiler/types.py b/artiq/compiler/types.py
@@ -610,8 +610,13 @@ def is_function(typ):
 def is_rpc_function(typ):
     return isinstance(typ.find(), TRPCFunction)
 
-def is_c_function(typ):
-    return isinstance(typ.find(), TCFunction)
+def is_c_function(typ, name=None):
+    typ = typ.find()
+    if name is None:
+        return isinstance(typ, TCFunction)
+    else:
+        return isinstance(typ, TCFunction) and \
+            typ.name == name
 
 def is_builtin(typ, name=None):
     typ = typ.find()

diff --git a/artiq/compiler/validators/escape.py b/artiq/compiler/validators/escape.py
@@ -87,7 +87,13 @@ def visit_sometimes_allocating(self, node):
             return None
 
     visit_BinOpT = visit_sometimes_allocating
-    visit_CallT = visit_sometimes_allocating
+
+    def visit_CallT(self, node):
+        if types.is_c_function(node.func.type, "cache_get"):
+            # The cache is borrow checked dynamically
+            return None
+        else:
+            self.visit_sometimes_allocating(node)
 
     # Value lives as long as the object/container, if it's mutable,
     # or else forever

diff --git a/artiq/coredevice/core.py b/artiq/coredevice/core.py
@@ -45,10 +45,6 @@ def cache_get(key: TStr) -> TList(TInt32):
 def cache_put(key: TStr, value: TList(TInt32)):
     raise NotImplementedError("syscall not simulated")
 
-@syscall
-def cache_clear(key: TStr):
-    raise NotImplementedError("syscall not simulated")
-
 class Core:
     """Core device driver.
 
@@ -128,7 +124,3 @@ def get_cache(self, key):
     @kernel
     def put_cache(self, key, value):
         return cache_put(key, value)
-
-    @kernel
-    def clear_cache(self, key):
-        return cache_clear(key)
diff --git a/artiq/coredevice/exceptions.py b/artiq/coredevice/exceptions.py
@@ -11,6 +11,10 @@ class InternalError(Exception):
     """Raised when the runtime encounters an internal error condition."""
 
 
+class CacheError(Exception):
+    """Raised when putting a value into a cache row would violate memory safety."""
+
+
 class RTIOUnderflow(Exception):
     """Raised when the CPU fails to submit a RTIO event early enough
     (with respect to the event's timestamp).

diff --git a/artiq/runtime/ksupport.c b/artiq/runtime/ksupport.c
@@ -124,7 +124,6 @@ static const struct symbol runtime_exports[] = {
 
     {"cache_get", &cache_get},
     {"cache_put", &cache_put},
-    {"cache_clear", &cache_clear},
 
     /* end */
     {NULL, NULL}
@@ -492,11 +491,6 @@ void cache_put(const char *key, struct artiq_list value)
     }
 }
 
-void cache_clear(const char *key)
-{
-    cache_put(key, (struct artiq_list) { 0, NULL });
-}
-
 void lognonl(const char *fmt, ...)
 {
     struct msg_log request;

diff --git a/artiq/runtime/ksupport.h b/artiq/runtime/ksupport.h
@@ -14,7 +14,6 @@ void send_rpc(int service, const char *tag, ...);
 int recv_rpc(void *slot);
 struct artiq_list cache_get(const char *key);
 void cache_put(const char *key, struct artiq_list value);
-void cache_clear(const char *key);
 void lognonl(const char *fmt, ...);
 void log(const char *fmt, ...);