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pipistrello: really do not request xtrig
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jordens committed Jun 29, 2015
1 parent 23eee94 commit e2cb0e1
Showing 1 changed file with 0 additions and 5 deletions.
5 changes: 0 additions & 5 deletions soc/targets/artiq_pipistrello.py
Original file line number Diff line number Diff line change
@@ -98,11 +98,6 @@ def __init__(self, platform, cpu_type="or1k", **kwargs):
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512,
ofifo_depth=4))

phy = ttl_simple.Inout(platform.request("xtrig"))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4,
ofifo_depth=4))

for i in range(16):
phy = ttl_simple.Output(platform.request("ttl", i))
self.submodules += phy

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