pipistrello: drop rtio fifos for invisible leds

jordens · jordens · commit 165ef20ffa88 · 2015-06-28T21:24:57.000-06:00
the main board leds are all under the adapter board

also tweak fifo depths a bit in a feeble attempt to circumvent a ISE hang (par
phase 4)
diff --git a/soc/targets/artiq_pipistrello.py b/soc/targets/artiq_pipistrello.py
@@ -105,12 +105,8 @@ def __init__(self, platform, cpu_type="or1k", **kwargs):
 
         phy = ttl_simple.Output(platform.request("ext_led", 0))
         self.submodules += phy
-        rtio_channels.append(rtio.Channel.from_phy(phy, ofifo_depth=4))
+        rtio_channels.append(rtio.Channel.from_phy(phy, ofifo_depth=256))
 
-        for i in range(2, 5):
-            phy = ttl_simple.Output(platform.request("user_led", i))
-            self.submodules += phy
-            rtio_channels.append(rtio.Channel.from_phy(phy, ofifo_depth=4))
         self.add_constant("RTIO_TTL_COUNT", len(rtio_channels))
 
         self.add_constant("RTIO_DDS_CHANNEL", len(rtio_channels))
