Skip to content

Commit 84f98b4

Browse files
committedSep 19, 2015
genlib/CRG: fix variable name conflict
1 parent 0a55ef5 commit 84f98b4

File tree

1 file changed

+3
-3
lines changed

1 file changed

+3
-3
lines changed
 

Diff for: ‎migen/genlib/io.py

+3-3
Original file line numberDiff line numberDiff line change
@@ -48,12 +48,12 @@ def __init__(self, clk, rst=0):
4848
clk = clk_se
4949

5050
# Power on Reset (vendor agnostic)
51-
rst = Signal(reset=1)
52-
self.sync.por += rst.eq(rst)
51+
int_rst = Signal(reset=1)
52+
self.sync.por += int_rst.eq(rst)
5353
self.comb += [
5454
self.cd_sys.clk.eq(clk),
5555
self.cd_por.clk.eq(clk),
56-
self.cd_sys.rst.eq(rst)
56+
self.cd_sys.rst.eq(int_rst)
5757
]
5858

5959

0 commit comments

Comments
 (0)
Please sign in to comment.