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tests: make hardware-in-the loop flags positive logic
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Explicitly having to disable unittests that require hardware
(ARTIQ_NO_HARDWARE) is cumbersome.
There is not even a sensible default for the
device or serial number of the devices requiring additional
variables (ARTIQ_LDA_DEVICE etc).

This patch reverts the logic by skipping unittests that
can not automatically determine whether the required hardware
is present and where it is.
jordens authored and sbourdeauducq committed Apr 3, 2015
1 parent 2995f0a commit fb91955
Showing 4 changed files with 23 additions and 32 deletions.
1 change: 0 additions & 1 deletion .travis.yml
Original file line number Diff line number Diff line change
@@ -7,7 +7,6 @@ env:
- PATH=$HOME/miniconda/bin:/usr/local/llvm-or1k/bin:$PATH
- CC=gcc-4.7
- CXX=g++-4.7
- ARTIQ_NO_HARDWARE=1
- BUILD_SOC=1
- secure: "DUk/Ihg8KbbzEgPF0qrHqlxU8e8eET9i/BtzNvFddIGX4HP/P2qz0nk3cVkmjuWhqJXSbC22RdKME9qqPzw6fJwJ6dpJ3OR6dDmSd7rewavq+niwxu52PVa+yK8mL4yf1terM7QQ5tIRf+yUL9qGKrZ2xyvEuRit6d4cFep43Ws="
before_install:
18 changes: 9 additions & 9 deletions artiq/test/full_stack.py
Original file line number Diff line number Diff line change
@@ -9,11 +9,11 @@
from artiq.sim import devices as sim_devices


no_hardware = bool(os.getenv("ARTIQ_NO_HARDWARE"))
core_device = os.getenv("ARTIQ_CORE_DEVICE")


def _run_on_device(k_class, **parameters):
comm = comm_serial.Comm()
comm = comm_serial.Comm(serial_dev=core_device)
try:
coredev = core.Core(comm=comm)
k_inst = k_class(core=coredev, **parameters)
@@ -199,7 +199,7 @@ def catch(self):
self.success = True


@unittest.skipIf(no_hardware, "no hardware")
@unittest.skipUnless(core_device, "no hardware")
class ExecutionCase(unittest.TestCase):
def test_primes(self):
l_device, l_host = [], []
@@ -208,7 +208,7 @@ def test_primes(self):
self.assertEqual(l_device, l_host)

def test_misc(self):
comm = comm_serial.Comm()
comm = comm_serial.Comm(serial_dev=core_device)
try:
coredev = core.Core(comm=comm)
uut = _Misc(core=coredev)
@@ -249,7 +249,7 @@ def test_exceptions(self):
self.assertEqual(t_device, t_host)

def test_rpc_exceptions(self):
comm = comm_serial.Comm()
comm = comm_serial.Comm(serial_dev=core_device)
try:
uut = _RPCExceptions(core=core.Core(comm=comm))
with self.assertRaises(_MyException):
@@ -306,13 +306,13 @@ def run(self):
self.o.pulse(25*us)


@unittest.skipIf(no_hardware, "no hardware")
@unittest.skipUnless(core_device, "no hardware")
class RTIOCase(unittest.TestCase):
# Connect channels 0 and 1 together for this test
# (C11 and C13 on Papilio Pro)
def test_loopback(self):
npulses = 4
comm = comm_serial.Comm()
comm = comm_serial.Comm(serial_dev=core_device)
try:
coredev = core.Core(comm=comm)
uut = _RTIOLoopback(
@@ -327,7 +327,7 @@ def test_loopback(self):
comm.close()

def test_underflow(self):
comm = comm_serial.Comm()
comm = comm_serial.Comm(serial_dev=core_device)
try:
coredev = core.Core(comm=comm)
uut = _RTIOUnderflow(
@@ -340,7 +340,7 @@ def test_underflow(self):
comm.close()

def test_sequence_error(self):
comm = comm_serial.Comm()
comm = comm_serial.Comm(serial_dev=core_device)
try:
coredev = core.Core(comm=comm)
uut = _RTIOSequenceError(
16 changes: 4 additions & 12 deletions artiq/test/lda.py
Original file line number Diff line number Diff line change
@@ -5,8 +5,7 @@
from artiq.language.units import dB


no_hardware = bool(os.getenv("ARTIQ_NO_HARDWARE")) \
or bool(os.getenv("ARTIQ_NO_PERIPHERALS"))
lda_serial = os.getenv("ARTIQ_LDA_SERIAL")


class GenericLdaTest:
@@ -20,18 +19,11 @@ def test_attenuation(self):
self.assertEqual(i, self.cont.get_attenuation())


@unittest.skipIf(no_hardware, "no hardware")
@unittest.skipUnless(lda_serial, "no hardware")
class TestLda(GenericLdaTest, unittest.TestCase):
def setUp(self):
device = os.getenv("ARTIQ_LDA_DEVICE")
serial = os.getenv("ARTIQ_LDA_SERIAL")
args = dict()
if device is not None:
args["product"] = device
if serial is not None:
args["serial"] = serial

self.cont = Lda(**args)
product = os.getenv("ARTIQ_LDA_PRODUCT")
self.cont = Lda(serial=lda_serial, product=product)


class TestLdaSim(GenericLdaTest, unittest.TestCase):
20 changes: 10 additions & 10 deletions artiq/test/thorlabs_tcube.py
Original file line number Diff line number Diff line change
@@ -6,10 +6,6 @@
from artiq.language.units import V


no_hardware = bool(os.getenv("ARTIQ_NO_HARDWARE")) \
or bool(os.getenv("ARTIQ_NO_PERIPHERALS"))


class GenericTdcTest:
def test_pot_parameters(self):
test_vector = 1, 2, 3, 4, 5, 6, 7, 8
@@ -135,23 +131,27 @@ def test_tpz_io_settings(self):
self.assertEqual(test_vector, self.cont.get_tpz_io_settings())


@unittest.skipIf(no_hardware, "no hardware")
tdc_serial = os.getenv("ARTIQ_TDC_SERIAL")


@unittest.skipUnless(tdc_serial, "no hardware")
class TestTdc(unittest.TestCase, GenericTdcTest):
def setUp(self):
serial_dev = os.getenv("ARTIQ_TDC001_SERIAL", "/dev/ttyUSB0")
self.cont = Tdc(serial_dev=serial_dev)
self.cont = Tdc(serial_dev=tdc_serial)


class TestTdcSim(unittest.TestCase, GenericTdcTest):
def setUp(self):
self.cont = TdcSim()


@unittest.skipIf(no_hardware, "no hardware")
tpz_serial = os.getenv("ARTIQ_TPZ_SERIAL")


@unittest.skipUnless(tpz_serial, "no hardware")
class TestTpz(unittest.TestCase, GenericTpzTest):
def setUp(self):
serial_dev = os.getenv("ARTIQ_TPZ001_SERIAL", "/dev/ttyUSB0")
self.cont = Tpz(serial_dev=serial_dev)
self.cont = Tpz(serial_dev=tpz_serial)


class TestTpzSim(unittest.TestCase, GenericTpzTest):

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