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base repository: m-labs/misoc
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base: 0db6e1d624bf
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head repository: m-labs/misoc
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compare: 85b3cced2250
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  • 2 commits
  • 3 files changed
  • 1 contributor

Commits on Apr 3, 2015

  1. Copy the full SHA
    c7361f1 View commit details
  2. use str.format

    sbourdeauducq committed Apr 3, 2015
    Copy the full SHA
    85b3cce View commit details
Showing with 8 additions and 8 deletions.
  1. +1 −1 make.py
  2. +1 −1 misoclib/soc/__init__.py
  3. +6 −6 software/common.mak
2 changes: 1 addition & 1 deletion make.py
Original file line number Diff line number Diff line change
@@ -96,7 +96,7 @@ def _get_args():
if action in actions:
actions[action] = True
else:
print("Unknown action: "+action+". Valid actions are:")
print("Unknown action: {}. Valid actions are:".format(action))
for a in action_list:
print(" "+a)
sys.exit(1)
2 changes: 1 addition & 1 deletion misoclib/soc/__init__.py
Original file line number Diff line number Diff line change
@@ -74,7 +74,7 @@ def __init__(self, platform, clk_freq,
elif cpu_type == "or1k":
self.add_cpu_or_bridge(mor1kx.MOR1KX(platform, self.cpu_reset_address))
else:
raise ValueError("Unsupported CPU type: "+cpu_type)
raise ValueError("Unsupported CPU type: {}".format(cpu_type))
self.add_wb_master(self.cpu_or_bridge.ibus)
self.add_wb_master(self.cpu_or_bridge.dbus)

12 changes: 6 additions & 6 deletions software/common.mak
Original file line number Diff line number Diff line change
@@ -11,13 +11,13 @@ LD_normal := $(TARGET_PREFIX)ld
OBJCOPY_normal := $(TARGET_PREFIX)objcopy
RANLIB_normal := $(TARGET_PREFIX)ranlib

CC_quiet = @echo " CC " $@ && $(TARGET_PREFIX)gcc
CX_quiet = @echo " CX " $@ && $(TARGET_PREFIX)g++
AS_quiet = @echo " AS " $@ && $(TARGET_PREFIX)as
AR_quiet = @echo " AR " $@ && $(TARGET_PREFIX)ar
LD_quiet = @echo " LD " $@ && $(TARGET_PREFIX)ld
CC_quiet = @echo " CC " $@ && $(TARGET_PREFIX)gcc
CX_quiet = @echo " CX " $@ && $(TARGET_PREFIX)g++
AS_quiet = @echo " AS " $@ && $(TARGET_PREFIX)as
AR_quiet = @echo " AR " $@ && $(TARGET_PREFIX)ar
LD_quiet = @echo " LD " $@ && $(TARGET_PREFIX)ld
OBJCOPY_quiet = @echo " OBJCOPY " $@ && $(TARGET_PREFIX)objcopy
RANLIB_quiet = @echo " RANLIB " $@ && $(TARGET_PREFIX)ranlib
RANLIB_quiet = @echo " RANLIB " $@ && $(TARGET_PREFIX)ranlib

MSC_GIT_ID := $(shell cd $(MSCDIR) && python3 -c "from misoclib.cpu.peripherals.identifier.git import get_id; print(hex(get_id()), end='')")