Skip to content

Commit 2583e97

Browse files
committedApr 3, 2015
soc/cpuif: fix CSR base generation for memories (name is already fullname)
1 parent c9c11e7 commit 2583e97

File tree

1 file changed

+1
-2
lines changed

1 file changed

+1
-2
lines changed
 

Diff for: ‎misoclib/soc/cpuif.py

+1-2
Original file line numberDiff line numberDiff line change
@@ -72,8 +72,7 @@ def get_csr_header(regions, interrupt_map):
7272
r = "#ifndef __GENERATED_CSR_H\n#define __GENERATED_CSR_H\n#include <hw/common.h>\n"
7373
for name, origin, busword, obj in regions:
7474
if isinstance(obj, Memory):
75-
fullname = name + "_" + obj.name_override
76-
r += "#define CSR_"+fullname.upper()+"_BASE "+hex(origin)+"\n"
75+
r += "#define CSR_"+name.upper()+"_BASE "+hex(origin)+"\n"
7776
else:
7877
r += "\n/* "+name+" */\n"
7978
r += "#define CSR_"+name.upper()+"_BASE "+hex(origin)+"\n"

0 commit comments

Comments
 (0)
Please sign in to comment.