interconnect/stream: add missing part of Demultiplexer

m-labs · Oct 4, 2015 · c38d817 · c38d817
1 parent af3723d
commit c38d817
Showing 1 changed file with 7 additions and 0 deletions.
diff --git a/misoc/interconnect/stream.py b/misoc/interconnect/stream.py
@@ -142,3 +142,10 @@ def __init__(self, layout, n):
             setattr(self, "source"+str(i), source)
             sources.append(source)
         self.sel = Signal(max=n)
+
+        # # #
+
+        cases = {}
+        for i, source in enumerate(sources):
+            cases[i] = Record.connect(self.sink, source)
+        self.comb += Case(self.sel, cases)