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from migen .fhdl .tools import insert_reset , rename_clock_domain
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- __all__ = ["DecorateModule" ,
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- "InsertCE" , "InsertReset" , "RenameClockDomains" ,
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- "CEInserter" , "ResetInserter" , "ClockDomainsRenamer" ,
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+ __all__ = ["CEInserter" , "ResetInserter" , "ClockDomainsRenamer" ,
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"ModuleTransformer" ]
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@@ -89,8 +87,6 @@ def transform_fragment_insert(self, i, f, to_insert):
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for ce , cdn in to_insert :
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f .sync [cdn ] = [If (ce , * f .sync [cdn ])]
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- InsertCE = CEInserter .adhoc
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-
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class ResetInserter (ControlInserter ):
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control_name = "reset"
@@ -99,8 +95,6 @@ def transform_fragment_insert(self, i, f, to_insert):
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for reset , cdn in to_insert :
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f .sync [cdn ] = insert_reset (reset , f .sync [cdn ])
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- InsertReset = ResetInserter .adhoc
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-
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class ClockDomainsRenamer (ModuleTransformer ):
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def __init__ (self , cd_remapping ):
@@ -111,5 +105,3 @@ def __init__(self, cd_remapping):
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def transform_fragment (self , i , f ):
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for old , new in self .cd_remapping .items ():
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rename_clock_domain (f , old , new )
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-
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- RenameClockDomains = ClockDomainsRenamer .adhoc
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