m-labs · Sep 7, 2015 · Sep 7, 2015 · Sep 7, 2015 · Sep 7, 2015 · Sep 7, 2015
diff --git a/.gitmodules b/.gitmodules
@@ -7,9 +7,6 @@
 [submodule "software/compiler-rt"]
 	path = software/compiler-rt
 	url = http://llvm.org/git/compiler-rt.git
-[submodule "extcores/litepcie_phy_wrappers"]
-	path = extcores/litepcie_phy_wrappers
-	url = https://github.com/enjoy-digital/litepcie_phy_wrappers
 [submodule "software/unwinder"]
 	path = software/unwinder
 	url = https://github.com/whitequark/libunwind
diff --git a/README b/README
@@ -29,10 +29,7 @@
    and logic, etc.
  * Possibility to encapsulate legacy Verilog/VHDL code.
  * Complex FPGA cores that can be used integrated in MiSoC or standalone:
-     - LitePcie:  a small footprint and configuragle PCIe core
      - LiteEth:   a small footprint and configurable Ethernet core
-     - LiteSATA:  a small footprint and configurable SATA core
-     - LiteScope: a small footprint and configurable logic analyzer core
 
 MiSoC comes with built-in support for the following boards:
  * Mixxeo, the digital video mixer from M-Labs [XC6SLX45]

diff --git a/extcores/litepcie_phy_wrappers b/extcores/litepcie_phy_wrappers
diff --git a/misoclib/com/litepcie/LICENSE b/misoclib/com/litepcie/LICENSE
diff --git a/misoclib/com/litepcie/README b/misoclib/com/litepcie/README
diff --git a/misoclib/com/litepcie/__init__.py b/misoclib/com/litepcie/__init__.py
diff --git a/misoclib/com/litepcie/common.py b/misoclib/com/litepcie/common.py
diff --git a/misoclib/com/litepcie/core/__init__.py b/misoclib/com/litepcie/core/__init__.py
diff --git a/misoclib/com/litepcie/core/irq/__init__.py b/misoclib/com/litepcie/core/irq/__init__.py
diff --git a/misoclib/com/litepcie/core/irq/interrupt_controller.py b/misoclib/com/litepcie/core/irq/interrupt_controller.py
diff --git a/misoclib/com/litepcie/core/packet/__init__.py b/misoclib/com/litepcie/core/packet/__init__.py
diff --git a/misoclib/com/litepcie/core/packet/common.py b/misoclib/com/litepcie/core/packet/common.py
diff --git a/misoclib/com/litepcie/core/packet/depacketizer.py b/misoclib/com/litepcie/core/packet/depacketizer.py
diff --git a/misoclib/com/litepcie/core/packet/packetizer.py b/misoclib/com/litepcie/core/packet/packetizer.py
diff --git a/misoclib/com/litepcie/core/switch/__init__.py b/misoclib/com/litepcie/core/switch/__init__.py
diff --git a/misoclib/com/litepcie/core/switch/common.py b/misoclib/com/litepcie/core/switch/common.py
diff --git a/misoclib/com/litepcie/core/switch/crossbar.py b/misoclib/com/litepcie/core/switch/crossbar.py
diff --git a/misoclib/com/litepcie/core/switch/request_controller.py b/misoclib/com/litepcie/core/switch/request_controller.py
diff --git a/misoclib/com/litepcie/doc/.keep_me b/misoclib/com/litepcie/doc/.keep_me
diff --git a/misoclib/com/litepcie/example_designs/__init__.py b/misoclib/com/litepcie/example_designs/__init__.py
diff --git a/misoclib/com/litepcie/example_designs/build/.keep_me b/misoclib/com/litepcie/example_designs/build/.keep_me
diff --git a/misoclib/com/litepcie/example_designs/make.py b/misoclib/com/litepcie/example_designs/make.py
diff --git a/misoclib/com/litepcie/example_designs/targets/__init__.py b/misoclib/com/litepcie/example_designs/targets/__init__.py
diff --git a/misoclib/com/litepcie/example_designs/targets/dma.py b/misoclib/com/litepcie/example_designs/targets/dma.py
diff --git a/misoclib/com/litepcie/example_designs/test/make.py b/misoclib/com/litepcie/example_designs/test/make.py
diff --git a/misoclib/com/litepcie/example_designs/test/test_regs.py b/misoclib/com/litepcie/example_designs/test/test_regs.py
diff --git a/misoclib/com/litepcie/frontend/__init__.py b/misoclib/com/litepcie/frontend/__init__.py
diff --git a/misoclib/com/litepcie/frontend/dma/__init__.py b/misoclib/com/litepcie/frontend/dma/__init__.py
diff --git a/misoclib/com/litepcie/frontend/dma/common.py b/misoclib/com/litepcie/frontend/dma/common.py
diff --git a/misoclib/com/litepcie/frontend/dma/reader.py b/misoclib/com/litepcie/frontend/dma/reader.py
diff --git a/misoclib/com/litepcie/frontend/dma/writer.py b/misoclib/com/litepcie/frontend/dma/writer.py
diff --git a/misoclib/com/litepcie/frontend/wishbone.py b/misoclib/com/litepcie/frontend/wishbone.py
diff --git a/misoclib/com/litepcie/litepcie-version.txt b/misoclib/com/litepcie/litepcie-version.txt
diff --git a/misoclib/com/litepcie/phy/__init__.py b/misoclib/com/litepcie/phy/__init__.py
diff --git a/misoclib/com/litepcie/phy/s7pciephy.py b/misoclib/com/litepcie/phy/s7pciephy.py
diff --git a/misoclib/com/litepcie/software/__init__.py b/misoclib/com/litepcie/software/__init__.py
diff --git a/misoclib/com/litepcie/software/linux/kernel/Makefile b/misoclib/com/litepcie/software/linux/kernel/Makefile
diff --git a/misoclib/com/litepcie/software/linux/kernel/README b/misoclib/com/litepcie/software/linux/kernel/README
diff --git a/misoclib/com/litepcie/software/linux/kernel/config.h b/misoclib/com/litepcie/software/linux/kernel/config.h
diff --git a/misoclib/com/litepcie/software/linux/kernel/flags.h b/misoclib/com/litepcie/software/linux/kernel/flags.h
diff --git a/misoclib/com/litepcie/software/linux/kernel/init.sh b/misoclib/com/litepcie/software/linux/kernel/init.sh
diff --git a/misoclib/com/litepcie/software/linux/kernel/litepcie.h b/misoclib/com/litepcie/software/linux/kernel/litepcie.h
diff --git a/misoclib/com/litepcie/software/linux/kernel/main.c b/misoclib/com/litepcie/software/linux/kernel/main.c
diff --git a/misoclib/com/litepcie/software/linux/user/Makefile b/misoclib/com/litepcie/software/linux/user/Makefile
diff --git a/misoclib/com/litepcie/software/linux/user/cutils.h b/misoclib/com/litepcie/software/linux/user/cutils.h
diff --git a/misoclib/com/litepcie/software/linux/user/litepcie_lib.c b/misoclib/com/litepcie/software/linux/user/litepcie_lib.c
diff --git a/misoclib/com/litepcie/software/linux/user/litepcie_lib.h b/misoclib/com/litepcie/software/linux/user/litepcie_lib.h
diff --git a/misoclib/com/litepcie/software/linux/user/litepcie_util.c b/misoclib/com/litepcie/software/linux/user/litepcie_util.c
diff --git a/misoclib/com/litepcie/software/wishbone.py b/misoclib/com/litepcie/software/wishbone.py
diff --git a/misoclib/com/litepcie/test/Makefile b/misoclib/com/litepcie/test/Makefile
diff --git a/misoclib/com/litepcie/test/common.py b/misoclib/com/litepcie/test/common.py
diff --git a/misoclib/com/litepcie/test/dma_tb.py b/misoclib/com/litepcie/test/dma_tb.py
diff --git a/misoclib/com/litepcie/test/model/__init__.py b/misoclib/com/litepcie/test/model/__init__.py
diff --git a/misoclib/com/litepcie/test/model/chipset.py b/misoclib/com/litepcie/test/model/chipset.py
diff --git a/misoclib/com/litepcie/test/model/host.py b/misoclib/com/litepcie/test/model/host.py