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base repository: m-labs/artiq
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base: 7feaca7c7caa
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head repository: m-labs/artiq
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compare: 0cd74533cac5
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  • 2 commits
  • 2 files changed
  • 1 contributor

Commits on Jul 27, 2015

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    228f7c3 View commit details
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    0cd7453 View commit details
Showing with 5 additions and 2 deletions.
  1. +1 −1 doc/manual/installing.rst
  2. +4 −1 soc/runtime/rtiocrg.c
2 changes: 1 addition & 1 deletion doc/manual/installing.rst
Original file line number Diff line number Diff line change
@@ -147,7 +147,7 @@ These steps are required to generate bitstream (``.bit``) files, build the MiSoC
::

$ cd ~/artiq-dev
$ svn co https://xc3sprog.svn.sourceforge.net/svnroot/xc3sprog/trunk xc3sprog
$ svn co http://svn.code.sf.net/p/xc3sprog/code/trunk xc3sprog
$ cd xc3sprog
$ cmake . && make
$ sudo make install
5 changes: 4 additions & 1 deletion soc/runtime/rtiocrg.c
Original file line number Diff line number Diff line change
@@ -24,8 +24,11 @@ void rtiocrg_init(void)
} else
printf("WARNING: unknown startup_clock entry in flash storage\n");

if(!rtiocrg_switch_clock(clk))
if(!rtiocrg_switch_clock(clk)) {
printf("WARNING: startup RTIO clock failed\n");
printf("WARNING: this may cause the system initialization to fail\n");
printf("WARNING: fix clocking and reset the device\n");
}
}

int rtiocrg_check(void)