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fhdl/specials: add Keep SynthesisDirective
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enjoy-digital committed Jun 23, 2015

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1 parent 71627cf commit d77a5fc
Showing 1 changed file with 5 additions and 0 deletions.
5 changes: 5 additions & 0 deletions migen/fhdl/specials.py
Original file line number Diff line number Diff line change
@@ -337,3 +337,8 @@ def emit_verilog(directive, ns, add_data_file):
name_dict = dict((k, ns.get_name(sig)) for k, sig in directive.signals.items())
formatted = directive.template.format(**name_dict)
return "// synthesis " + formatted + "\n"


class Keep(SynthesisDirective):
def __init__(self, signal):
SynthesisDirective.__init__(self, "attribute keep of {s} is true", s=signal)

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