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pipistrello: tweak fifo depths a bit
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ise being dull again, inferring all but one 64x64 fifo as bram...
minimum bram depth is 256 anyway
jordens committed Jun 23, 2015
1 parent cd249b2 commit 5b3eac1
Showing 1 changed file with 4 additions and 4 deletions.
8 changes: 4 additions & 4 deletions soc/targets/artiq_pipistrello.py
Original file line number Diff line number Diff line change
@@ -99,21 +99,21 @@ def __init__(self, platform, cpu_type="or1k", **kwargs):

phy = ttl_simple.Inout(platform.request("xtrig", 0))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy))
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))

for i in range(16):
phy = ttl_simple.Output(platform.request("ttl", i))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy))
rtio_channels.append(rtio.Channel.from_phy(phy, ofifo_depth=256))

phy = ttl_simple.Output(platform.request("ext_led", 0))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy))
rtio_channels.append(rtio.Channel.from_phy(phy, ofifo_depth=4))

for i in range(2, 5):
phy = ttl_simple.Output(platform.request("user_led", i))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy))
rtio_channels.append(rtio.Channel.from_phy(phy, ofifo_depth=4))
self.add_constant("RTIO_TTL_COUNT", len(rtio_channels))

self.add_constant("RTIO_DDS_CHANNEL", len(rtio_channels))

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