m-labs · May 1, 2015 · May 1, 2015 · May 1, 2015 · May 1, 2015
diff --git a/misoclib/com/liteeth/example_designs/test/make.py b/misoclib/com/liteeth/example_designs/test/make.py
@@ -19,11 +19,11 @@ def _get_args():
 if __name__ == "__main__":
     args = _get_args()
     if args.bridge == "uart":
-        from misoclib.tools.litescope.host.driver.uart import LiteScopeUART2WishboneDriver
+        from misoclib.tools.litescope.software.driver.uart import LiteScopeUART2WishboneDriver
         port = args.port if not args.port.isdigit() else int(args.port)
         wb = LiteScopeUART2WishboneDriver(port, args.baudrate, "./csr.csv", int(args.busword), debug=False)
     elif args.bridge == "etherbone":
-        from misoclib.tools.litescope.host.driver.etherbone import LiteScopeEtherboneDriver
+        from misoclib.tools.litescope.software.driver.etherbone import LiteScopeEtherboneDriver
         wb = LiteScopeEtherboneDriver(args.ip_address, int(args.udp_port), "./csr.csv", int(args.busword), debug=False)
     else:
         ValueError("Invalid bridge {}".format(args.bridge))

diff --git a/misoclib/com/liteeth/example_designs/test/test_la.py b/misoclib/com/liteeth/example_designs/test/test_la.py
@@ -1,5 +1,5 @@
 import time
-from misoclib.tools.litescope.host.driver.la import LiteScopeLADriver
+from misoclib.tools.litescope.software.driver.la import LiteScopeLADriver
 
 
 def main(wb):

diff --git a/misoclib/com/litepcie/example_designs/test/make.py b/misoclib/com/litepcie/example_designs/test/make.py
@@ -21,14 +21,14 @@ def _get_args():
 if __name__ == "__main__":
     args = _get_args()
     if args.bridge == "uart":
-        from misoclib.tools.litescope.host.driver.uart import LiteScopeUART2WishboneDriver
+        from misoclib.tools.litescope.software.driver.uart import LiteScopeUART2WishboneDriver
         port = args.port if not args.port.isdigit() else int(args.port)
         wb = LiteScopeUART2WishboneDriver(port, args.baudrate, "./csr.csv", int(args.busword), debug=False)
     elif args.bridge == "etherbone":
-        from misoclib.tools.litescope.host.driver.etherbone import LiteScopeEtherboneDriver
+        from misoclib.tools.litescope.software.driver.etherbone import LiteScopeEtherboneDriver
         wb = LiteScopeEtherboneDriver(args.ip_address, int(args.udp_port), "./csr.csv", int(args.busword), debug=False)
     elif args.bridge == "pcie":
-        from misoclib.tools.litescope.host.driver.pcie import LiteScopePCIeDriver
+        from misoclib.tools.litescope.software.driver.pcie import LiteScopePCIeDriver
         wb = LiteScopePCIeDriver(args.bar, args.bar_size, "./csr.csv", int(args.busword), debug=False)
     else:
         ValueError("Invalid bridge {}".format(args.bridge))

diff --git a/misoclib/com/liteusb/frontend/wishbone.py b/misoclib/com/liteusb/frontend/wishbone.py
@@ -0,0 +1,14 @@
+from migen.fhdl.std import *
+
+from misoclib.com.liteusb.common import *
+from misoclib.tools.litescope.bridge.wishbone import LiteScopeWishboneBridge
+
+class LiteUSBWishboneBridge(LiteScopeWishboneBridge):
+    def __init__(self, port, clk_freq):
+        LiteScopeWishboneBridge.__init__(self, port, clk_freq)
+        self.comb += [
+            port.sink.sop.eq(1),
+            port.sink.eop.eq(1),
+            port.sink.length.eq(1),
+            port.sink.dst.eq(port.tag)
+        ]
diff --git a/misoclib/tools/litescope/host/__init__.py → misoclib/com/liteusb/software/__init__.py b/misoclib/tools/litescope/host/__init__.py → misoclib/com/liteusb/software/__init__.py
diff --git a/misoclib/com/liteusb/software/ftdi/__init__.py b/misoclib/com/liteusb/software/ftdi/__init__.py
@@ -5,13 +5,10 @@
 import queue
 import threading
 
-_lpath = (os.path.dirname(__file__))
-if _lpath == '':
-    _lpath = '.'
 if platform.system() == "Windows":
-    libftdicom =  ctypes.cdll.LoadLibrary(_lpath + "/libftdicom.dll")
+    libftdicom =  ctypes.cdll.LoadLibrary("./libftdicom.dll")
 else:
-    libftdicom =  ctypes.cdll.LoadLibrary(_lpath + "/libftdicom.so")
+    libftdicom =  ctypes.cdll.LoadLibrary("./libftdicom.so")
 
 
 class FTDI_Device(ctypes.Structure):

diff --git a/misoclib/mem/litesata/example_designs/test/bist.py b/misoclib/mem/litesata/example_designs/test/bist.py
@@ -2,7 +2,7 @@
 import argparse
 import random as rand
 from collections import OrderedDict
-from misoclib.tools.litescope.host.driver.uart import LiteScopeUART2WishboneDriver
+from misoclib.tools.litescope.software.driver.uart import LiteScopeUART2WishboneDriver
 
 KB = 1024
 MB = 1024*KB

diff --git a/misoclib/mem/litesata/example_designs/test/make.py b/misoclib/mem/litesata/example_designs/test/make.py
@@ -19,11 +19,11 @@ def _get_args():
 if __name__ == "__main__":
     args = _get_args()
     if args.bridge == "uart":
-        from misoclib.tools.litescope.host.driver.uart import LiteScopeUART2WishboneDriver
+        from misoclib.tools.litescope.software.driver.uart import LiteScopeUART2WishboneDriver
         port = args.port if not args.port.isdigit() else int(args.port)
         wb = LiteScopeUART2WishboneDriver(port, args.baudrate, "./csr.csv", int(args.busword), debug=False)
     elif args.bridge == "etherbone":
-        from misoclib.tools.litescope.host.driver.etherbone import LiteScopeEtherboneDriver
+        from misoclib.tools.litescope.software.driver.etherbone import LiteScopeEtherboneDriver
         wb = LiteScopeEtherboneDriver(args.ip_address, int(args.udp_port), "./csr.csv", int(args.busword), debug=False)
     else:
         ValueError("Invalid bridge {}".format(args.bridge))

diff --git a/misoclib/mem/litesata/example_designs/test/test_la.py b/misoclib/mem/litesata/example_designs/test/test_la.py
@@ -1,7 +1,7 @@
 import sys
 from tools import *
 from test_bist import *
-from litescope.host.driver.la import LiteScopeLADriver
+from litescope.software.driver.la import LiteScopeLADriver
 
 
 def main(wb):

diff --git a/misoclib/mem/litesata/example_designs/test/tools.py b/misoclib/mem/litesata/example_designs/test/tools.py
@@ -1,4 +1,4 @@
-from litescope.host.dump import *
+from litescope.software.dump import *
 
 primitives = {
     "ALIGN":  0x7B4A4ABC,

diff --git a/misoclib/tools/litescope/bridge/wishbone.py b/misoclib/tools/litescope/bridge/wishbone.py
@@ -50,7 +50,8 @@ def __init__(self, phy, clk_freq):
         self.submodules += fsm, timeout
         self.comb += [
             timeout.ce.eq(1),
-            fsm.reset.eq(timeout.reached)
+            fsm.reset.eq(timeout.reached),
+            phy.source.ack.eq(1)
         ]
         fsm.act("IDLE",
             timeout.reset.eq(1),

diff --git a/misoclib/tools/litescope/example_designs/test/make.py b/misoclib/tools/litescope/example_designs/test/make.py
@@ -19,11 +19,11 @@ def _get_args():
 if __name__ == "__main__":
     args = _get_args()
     if args.bridge == "uart":
-        from misoclib.tools.litescope.host.driver.uart import LiteScopeUART2WishboneDriver
+        from misoclib.tools.litescope.software.driver.uart import LiteScopeUART2WishboneDriver
         port = args.port if not args.port.isdigit() else int(args.port)
         wb = LiteScopeUART2WishboneDriver(port, args.baudrate, "./csr.csv", int(args.busword), debug=False)
     elif args.bridge == "etherbone":
-        from misoclib.tools.litescope.host.driver.etherbone import LiteScopeEtherboneDriver
+        from misoclib.tools.litescope.software.driver.etherbone import LiteScopeEtherboneDriver
         wb = LiteScopeEtherboneDriver(args.ip_address, int(args.udp_port), "./csr.csv", int(args.busword), debug=False)
     else:
         ValueError("Invalid bridge {}".format(args.bridge))

diff --git a/misoclib/tools/litescope/example_designs/test/test_io.py b/misoclib/tools/litescope/example_designs/test/test_io.py
@@ -1,5 +1,5 @@
 import time
-from misoclib.tools.litescope.host.driver.io import LiteScopeIODriver
+from misoclib.tools.litescope.software.driver.io import LiteScopeIODriver
 
 
 def led_anim0(io):

diff --git a/misoclib/tools/litescope/example_designs/test/test_la.py b/misoclib/tools/litescope/example_designs/test/test_la.py
@@ -1,4 +1,4 @@
-from misoclib.tools.litescope.host.driver.la import LiteScopeLADriver
+from misoclib.tools.litescope.software.driver.la import LiteScopeLADriver
 
 
 def main(wb):

diff --git a/...b/tools/litescope/host/driver/__init__.py → ...clib/tools/litescope/software/__init__.py b/...b/tools/litescope/host/driver/__init__.py → ...clib/tools/litescope/software/__init__.py
diff --git a/misoclib/tools/litescope/software/driver/__init__.py b/misoclib/tools/litescope/software/driver/__init__.py
diff --git a/.../tools/litescope/host/driver/etherbone.py → ...ls/litescope/software/driver/etherbone.py b/.../tools/litescope/host/driver/etherbone.py → ...ls/litescope/software/driver/etherbone.py
@@ -1,5 +1,5 @@
 import socket
-from misoclib.tools.litescope.host.driver.reg import *
+from misoclib.tools.litescope.software.driver.reg import *
 
 from liteeth.test.model.etherbone import *
 

diff --git a/misoclib/tools/litescope/host/driver/io.py → ...lib/tools/litescope/software/driver/io.py b/misoclib/tools/litescope/host/driver/io.py → ...lib/tools/litescope/software/driver/io.py
diff --git a/misoclib/tools/litescope/host/driver/la.py → ...lib/tools/litescope/software/driver/la.py b/misoclib/tools/litescope/host/driver/la.py → ...lib/tools/litescope/software/driver/la.py
@@ -1,8 +1,8 @@
 import csv
 from struct import *
 from migen.fhdl.structure import *
-from misoclib.tools.litescope.host.dump import *
-from misoclib.tools.litescope.host.driver.truthtable import *
+from misoclib.tools.litescope.software.dump import *
+from misoclib.tools.litescope.software.driver.truthtable import *
 
 
 class LiteScopeLADriver():
@@ -125,16 +125,16 @@ def save(self, filename):
             print("saving to " + filename)
         name, ext = os.path.splitext(filename)
         if ext == ".vcd":
-            from misoclib.tools.litescope.host.dump.vcd import VCDDump
+            from misoclib.tools.litescope.software.dump.vcd import VCDDump
             dump = VCDDump()
         elif ext == ".csv":
-            from misoclib.tools.litescope.host.dump.csv import CSVDump
+            from misoclib.tools.litescope.software.dump.csv import CSVDump
             dump = CSVDump()
         elif ext == ".py":
-            from misoclib.tools.litescope.host.dump.python import PythonDump
+            from misoclib.tools.litescope.software.dump.python import PythonDump
             dump = PythonDump()
         elif ext == ".sr":
-            from misoclib.tools.litescope.host.dump.sigrok import SigrokDump
+            from misoclib.tools.litescope.software.dump.sigrok import SigrokDump
             if self.samplerate is None:
                 raise ValueError("Unable to automatically retrieve clk_freq, clk_freq parameter required")
             dump = SigrokDump(samplerate=self.samplerate)

diff --git a/misoclib/tools/litescope/host/driver/pcie.py → ...b/tools/litescope/software/driver/pcie.py b/misoclib/tools/litescope/host/driver/pcie.py → ...b/tools/litescope/software/driver/pcie.py
@@ -1,6 +1,6 @@
 import string
 import mmap
-from misoclib.tools.litescope.host.driver.reg import *
+from misoclib.tools.litescope.software.driver.reg import *
 
 
 class LiteScopePCIeDriver:

diff --git a/misoclib/tools/litescope/host/driver/reg.py → ...ib/tools/litescope/software/driver/reg.py b/misoclib/tools/litescope/host/driver/reg.py → ...ib/tools/litescope/software/driver/reg.py
diff --git a/...tools/litescope/host/driver/truthtable.py → ...s/litescope/software/driver/truthtable.py b/...tools/litescope/host/driver/truthtable.py → ...s/litescope/software/driver/truthtable.py
diff --git a/misoclib/tools/litescope/host/driver/uart.py → ...b/tools/litescope/software/driver/uart.py b/misoclib/tools/litescope/host/driver/uart.py → ...b/tools/litescope/software/driver/uart.py
@@ -1,6 +1,6 @@
 import serial
 from struct import *
-from misoclib.tools.litescope.host.driver.reg import *
+from misoclib.tools.litescope.software.driver.reg import *
 
 
 def write_b(uart, data):

diff --git a/misoclib/tools/litescope/software/driver/usb.py b/misoclib/tools/litescope/software/driver/usb.py
@@ -0,0 +1,71 @@
+from misoclib.com.liteusb.software.ftdi import FTDIComDevice
+
+class LiteScopeUSB2WishboneFTDIDriver:
+    cmds = {
+        "write": 0x01,
+        "read":  0x02
+    }
+    def __init__(self, interface, mode, tag, addrmap=None, debug=False):
+        self.interface = interface
+        self.mode = mode
+        self.tag = tag
+        self.debug = debug
+        self.com = FTDIComDevice(self.interface,
+                                 mode=mode,
+                                 uart_tag=tag,
+                                 dma_tag=16, # XXX FIXME
+                                 verbose=debug)
+        if addrmap is not None:
+            self.regs = build_map(addrmap, busword, self.read, self.write)
+
+    def open(self):
+        self.com.open()
+
+    def close(self):
+        self.com.close()
+
+    # XXX regroup cmds in a single packet
+    def read(self, addr, burst_length=1):
+        datas = []
+        self.com.uartflush()
+        self.com.uartwrite(self.cmds["read"])
+        self.com.uartwrite(burst_length)
+        word_addr = addr//4
+        self.com.uartwrite((word_addr >> 24) & 0xff)
+        self.com.uartwrite((word_addr >> 16) & 0xff)
+        self.com.uartwrite((word_addr >> 8) & 0xff)
+        self.com.uartwrite((word_addr >> 0) & 0xff)
+        for i in range(burst_length):
+            data = 0
+            for k in range(4):
+                data = data << 8
+                data |= self.com.uartread()
+            if self.debug:
+                print("RD {:08X} @ {:08X}".format(data, addr + 4*i))
+            datas.append(data)
+        if burst_length == 1:
+            return datas[0]
+        else:
+            return datas
+
+    # XXX regroup cmds in a single packet
+    def write(self, addr, data):
+        if isinstance(data, list):
+            burst_length = len(data)
+        else:
+            burst_length = 1
+            data = [data]
+        self.com.uartwrite(self.cmds["write"])
+        self.com.uartwrite(burst_length)
+        word_addr = addr//4
+        self.com.uartwrite((word_addr >> 24) & 0xff)
+        self.com.uartwrite((word_addr >> 16) & 0xff)
+        self.com.uartwrite((word_addr >> 8) & 0xff)
+        self.com.uartwrite((word_addr >> 0) & 0xff)
+        for i in range(len(data)):
+            dat = data[i]
+            for j in range(4):
+                self.com.uartwrite((dat >> 24) & 0xff)
+                dat = dat << 8
+            if self.debug:
+                print("WR {:08X} @ {:08X}".format(data[i], addr + 4*i))
diff --git a/...lib/tools/litescope/host/dump/__init__.py → ...tools/litescope/software/dump/__init__.py b/...lib/tools/litescope/host/dump/__init__.py → ...tools/litescope/software/dump/__init__.py
diff --git a/misoclib/tools/litescope/host/dump/csv.py → ...clib/tools/litescope/software/dump/csv.py b/misoclib/tools/litescope/host/dump/csv.py → ...clib/tools/litescope/software/dump/csv.py
@@ -1,4 +1,4 @@
-from misoclib.tools.litescope.host.dump import *
+from misoclib.tools.litescope.software.dump import *
 
 
 class CSVDump(Dump):

diff --git a/misoclib/tools/litescope/host/dump/python.py → ...b/tools/litescope/software/dump/python.py b/misoclib/tools/litescope/host/dump/python.py → ...b/tools/litescope/software/dump/python.py
@@ -1,4 +1,4 @@
-from misoclib.tools.litescope.host.dump import *
+from misoclib.tools.litescope.software.dump import *
 
 
 class PythonDump(Dump):

diff --git a/misoclib/tools/litescope/host/dump/sigrok.py → ...b/tools/litescope/software/dump/sigrok.py b/misoclib/tools/litescope/host/dump/sigrok.py → ...b/tools/litescope/software/dump/sigrok.py
@@ -5,7 +5,7 @@
 import re
 from collections import OrderedDict
 
-from misoclib.tools.litescope.host.dump import *
+from misoclib.tools.litescope.software.dump import *
 
 
 class SigrokDump(Dump):

diff --git a/misoclib/tools/litescope/host/dump/vcd.py → ...clib/tools/litescope/software/dump/vcd.py b/misoclib/tools/litescope/host/dump/vcd.py → ...clib/tools/litescope/software/dump/vcd.py
@@ -1,5 +1,5 @@
 import datetime
-from misoclib.tools.litescope.host.dump import *
+from misoclib.tools.litescope.software.dump import *
 
 
 class VCDDump(Dump):