rtio/phy/ttl_simple: reset sensitivity with RTIO logic

m-labs · May 2, 2015 · cb65b1e · cb65b1e
1 parent d8fdac6
commit cb65b1e
Showing 1 changed file with 5 additions and 6 deletions.
diff --git a/artiq/gateware/rtio/phy/ttl_simple.py b/artiq/gateware/rtio/phy/ttl_simple.py
@@ -26,12 +26,11 @@ def __init__(self, pad):
         sensitivity = Signal(2)
 
         self.sync.rio_phy += If(self.rtlink.o.stb,
-            Case(self.rtlink.o.address, {
-                0: ts.o.eq(self.rtlink.o.data[0]),
-                1: ts.oe.eq(self.rtlink.o.data[0]),
-                2: sensitivity.eq(self.rtlink.o.data)
-            }).makedefault()
-        )
+                If(self.rtlink.o.address == 0, ts.o.eq(self.rtlink.o.data[0])),
+                If(self.rtlink.o.address == 1, ts.oe.eq(self.rtlink.o.data[0])),
+            )
+        self.sync.rio += If(self.rtlink.o.stb & (self.rtlink.o.address == 2),
+            sensitivity.eq(self.rtlink.o.data))
 
         i = Signal()
         i_d = Signal()