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Commit d249182

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author
Sebastien Bourdeauducq
committedMar 1, 2013
csr/SRAM: prefix page register with memory name
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‎migen/bus/csr.py

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Original file line numberDiff line numberDiff line change
@@ -62,7 +62,7 @@ def __init__(self, mem_or_size, address, bus=None):
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self.address = address
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page_bits = _compute_page_bits(self.mem.depth)
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if page_bits:
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self._page = RegisterField("page", page_bits)
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self._page = RegisterField(self.mem.name_override + "_page", page_bits)
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else:
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self._page = None
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if bus is None:

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