csr/SRAM: prefix page register with memory name

m-labs · Mar 1, 2013 · d249182 · d249182
1 parent c10622f
commit d249182
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/migen/bus/csr.py b/migen/bus/csr.py
@@ -62,7 +62,7 @@ def __init__(self, mem_or_size, address, bus=None):
 		self.address = address
 		page_bits = _compute_page_bits(self.mem.depth)
 		if page_bits:
-			self._page = RegisterField("page", page_bits)
+			self._page = RegisterField(self.mem.name_override + "_page", page_bits)
 		else:
 			self._page = None
 		if bus is None: