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base repository: m-labs/artiq
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head repository: m-labs/artiq
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compare: 9ba8dfbf2365
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  • 3 commits
  • 3 files changed
  • 1 contributor

Commits on Dec 26, 2015

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Showing with 36 additions and 4 deletions.
  1. +24 −3 artiq/coredevice/analyzer.py
  2. +6 −1 artiq/gateware/rtio/core.py
  3. +6 −0 examples/master/device_db.pyon
27 changes: 24 additions & 3 deletions artiq/coredevice/analyzer.py
Original file line number Diff line number Diff line change
@@ -155,9 +155,26 @@ def process_message(self, message):
else:
self.channel_value.set_value("X")
elif isinstance(message, InputMessage):
logger.debug("TTL read @%d %d, name: %s",
message.timestamp, message.data, self.name)
self.channel_value.set_value(str(message.data))


class TTLClockGenHandler:
def __init__(self, vcd_manager, name, ref_period):
self.name = name
self.ref_period = ref_period
self.channel_frequency = vcd_manager.get_channel(
"ttl_clkgen/" + name, 64)

def process_message(self, message):
if isinstance(message, OutputMessage):
logger.debug("TTL_CLKGEN write @%d %d to %d, name: %s",
message.timestamp, message.data, message.address, self.name)
frequency = message.data/self.ref_period/2**24
self.channel_frequency.set_value_double(frequency)


class DDSHandler:
def __init__(self, vcd_manager, dds_type, onehot_sel, sysclk):
self.vcd_manager = vcd_manager
@@ -260,15 +277,19 @@ def get_ref_period(devices):
return ref_period


def create_channel_handlers(vcd_manager, devices, log_channel,
dds_channel, dds_onehot_sel):
def create_channel_handlers(vcd_manager, devices, ref_period,
log_channel, dds_channel, dds_onehot_sel):
channel_handlers = dict()
for name, desc in sorted(devices.items(), key=itemgetter(0)):
if isinstance(desc, dict) and desc["type"] == "local":
if (desc["module"] == "artiq.coredevice.ttl"
and desc["class"] in {"TTLOut", "TTLInOut"}):
channel = desc["arguments"]["channel"]
channel_handlers[channel] = TTLHandler(vcd_manager, name)
if (desc["module"] == "artiq.coredevice.ttl"
and desc["class"] == "TTLClockGen"):
channel = desc["arguments"]["channel"]
channel_handlers[channel] = TTLClockGenHandler(vcd_manager, name, ref_period)
if (desc["module"] == "artiq.coredevice.dds"
and desc["class"] in {"AD9858", "AD9914"}):
sysclk = desc["arguments"]["sysclk"]
@@ -301,7 +322,7 @@ def decoded_dump_to_vcd(fileobj, devices, dump):
ref_period = 1e-9 # guess

channel_handlers = create_channel_handlers(
vcd_manager, devices,
vcd_manager, devices, ref_period,
dump.log_channel, dump.dds_channel, dump.dds_onehot_sel)
slack = vcd_manager.get_channel("rtio_slack", 64)

7 changes: 6 additions & 1 deletion artiq/gateware/rtio/core.py
Original file line number Diff line number Diff line change
@@ -290,8 +290,13 @@ def __init__(self, interface, counter, fifo_depth):


class Channel:
def __init__(self, interface, probes=[], overrides=[],
def __init__(self, interface, probes=None, overrides=None,
ofifo_depth=64, ififo_depth=64):
if probes is None:
probes = []
if overrides is None:
overrides = []

self.interface = interface
self.probes = probes
self.overrides = overrides
6 changes: 6 additions & 0 deletions examples/master/device_db.pyon
Original file line number Diff line number Diff line change
@@ -66,6 +66,12 @@
"class": "TTLOut",
"arguments": {"channel": 18}
},
"ttl15": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLClockGen",
"arguments": {"channel": 19}
},

"dds_bus": {
"type": "local",