transforms.cfg_simplifier: remove.

Specifically, the following idiom broke our CFGSimplifier: b1: branch_if %cond, %b2, %b3 b2: branch %b3 b3: %v = phi [ %b2 => 0, %b3 => 1 ] This is very annoying to properly handle in general case, and also this (specifically %b2) is exactly what broke LocalAccessValidator in the first place. So, remove CFGSimplifier altogether. Instead, teach LocalAccessValidator how to look through predecessors in order to get a location.
m-labs · Dec 31, 2015 · 9ed6b54 · 9ed6b54
1 parent 17802d3
commit 9ed6b54
Showing 4 changed files with 16 additions and 42 deletions.
diff --git a/artiq/compiler/module.py b/artiq/compiler/module.py
@@ -55,7 +55,6 @@ def __init__(self, src, ref_period=1e-6):
         artiq_ir_generator = transforms.ARTIQIRGenerator(engine=self.engine,
                                                          module_name=src.name,
                                                          ref_period=ref_period)
-        cfg_simplifier = transforms.CFGSimplifier(engine=self.engine)
         dead_code_eliminator = transforms.DeadCodeEliminator(engine=self.engine)
         local_access_validator = validators.LocalAccessValidator(engine=self.engine)
         devirtualization = analyses.Devirtualization()
@@ -71,7 +70,6 @@ def __init__(self, src, ref_period=1e-6):
         devirtualization.visit(src.typedtree)
         self.artiq_ir = artiq_ir_generator.visit(src.typedtree)
         artiq_ir_generator.annotate_calls(devirtualization)
-        cfg_simplifier.process(self.artiq_ir)
         dead_code_eliminator.process(self.artiq_ir)
         interleaver.process(self.artiq_ir)
         local_access_validator.process(self.artiq_ir)

diff --git a/artiq/compiler/transforms/__init__.py b/artiq/compiler/transforms/__init__.py
@@ -4,6 +4,5 @@
 from .iodelay_estimator import IODelayEstimator
 from .artiq_ir_generator import ARTIQIRGenerator
 from .dead_code_eliminator import DeadCodeEliminator
-from .cfg_simplifier import CFGSimplifier
 from .llvm_ir_generator import LLVMIRGenerator
 from .interleaver import Interleaver
diff --git a/artiq/compiler/transforms/cfg_simplifier.py b/artiq/compiler/transforms/cfg_simplifier.py
diff --git a/artiq/compiler/validators/local_access.py b/artiq/compiler/validators/local_access.py
@@ -143,11 +143,23 @@ def pred_at_fault(env, var_name):
 
     def _uninitialized_access(self, insn, var_name, pred_at_fault):
         if pred_at_fault is not None:
+            visited = set()
+            possible_preds = [pred_at_fault]
+
             uninitialized_loc = None
-            for pred_insn in reversed(pred_at_fault.instructions):
-                if pred_insn.loc is not None:
-                    uninitialized_loc = pred_insn.loc.begin()
-                    break
+            while uninitialized_loc is None:
+                possible_pred = possible_preds.pop(0)
+                visited.add(possible_pred)
+
+                for pred_insn in reversed(possible_pred.instructions):
+                    if pred_insn.loc is not None:
+                        uninitialized_loc = pred_insn.loc.begin()
+                        break
+
+                for block in possible_pred.predecessors():
+                    if block not in visited:
+                        possible_preds.append(block)
+
             assert uninitialized_loc is not None
 
             note = diagnostic.Diagnostic("note",