compiler: validate local accesses after interleaving.

m-labs · Dec 30, 2015 · 78fb3e1 · 78fb3e1
1 parent df91500
commit 78fb3e1
Showing 2 changed files with 7 additions and 2 deletions.
diff --git a/artiq/compiler/module.py b/artiq/compiler/module.py
@@ -72,9 +72,9 @@ def __init__(self, src, ref_period=1e-6):
         self.artiq_ir = artiq_ir_generator.visit(src.typedtree)
         artiq_ir_generator.annotate_calls(devirtualization)
         cfg_simplifier.process(self.artiq_ir)
-        local_access_validator.process(self.artiq_ir)
         dead_code_eliminator.process(self.artiq_ir)
         interleaver.process(self.artiq_ir)
+        local_access_validator.process(self.artiq_ir)
 
     def build_llvm_ir(self, target):
         """Compile the module to LLVM IR for the specified target."""

diff --git a/artiq/compiler/transforms/dead_code_eliminator.py b/artiq/compiler/transforms/dead_code_eliminator.py
@@ -27,7 +27,12 @@ def process_function(self, func):
         while modified:
             modified = False
             for insn in func.instructions():
-                if isinstance(insn, (ir.Phi, ir.Alloc, ir.GetLocal, ir.GetConstructor,
+                # Note that GetLocal is treated as an impure operation:
+                # the local access validator has to observe it to emit
+                # a diagnostic for reads of uninitialized locals, and
+                # it also has to run after the interleaver, but interleaver
+                # doesn't like to work with IR before DCE.
+                if isinstance(insn, (ir.Phi, ir.Alloc, ir.GetConstructor,
                                      ir.GetAttr, ir.GetElem, ir.Coerce, ir.Arith,
                                      ir.Compare, ir.Closure, ir.Select, ir.Quote)) \
                         and not any(insn.uses):