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base repository: m-labs/artiq
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base: cdcb57effed1
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head repository: m-labs/artiq
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compare: b96e0d241e11
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  • 2 commits
  • 2 files changed
  • 1 contributor

Commits on Dec 20, 2015

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    4b5c10b View commit details
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    b96e0d2 View commit details
Showing with 28 additions and 9 deletions.
  1. +27 −8 artiq/coredevice/analyzer.py
  2. +1 −1 artiq/coredevice/core.py
35 changes: 27 additions & 8 deletions artiq/coredevice/analyzer.py
Original file line number Diff line number Diff line change
@@ -3,11 +3,8 @@
from itertools import count
from enum import Enum
import struct
import importlib
import logging

from artiq.coredevice import ttl


logger = logging.getLogger(__name__)

@@ -110,6 +107,9 @@ def __init__(self, filename):
self.codes = vcd_codes()
self.current_time = None

def set_timescale_ns(self, timescale):
self.out.write("$timescale {}ns $end\n".format(timescale))

def get_channel(self, name, width):
code = next(self.codes)
self.out.write("$var wire {width} {code} {name} $end\n"
@@ -145,13 +145,25 @@ def process_message(self, message):
self.channel_value.set_value("X")


def get_timescale(devices):
timescale = None
for desc in devices.values():
if isinstance(desc, dict) and desc["type"] == "local":
if (desc["module"] == "artiq.coredevice.core"
and desc["class"] == "Core"):
if timescale is None:
timescale = desc["arguments"]["ref_period"]*1e9
else:
return None # more than one core device found
return timescale


def create_channel_handlers(vcd_manager, devices):
channel_handlers = dict()
for name, desc in sorted(devices.items(), key=itemgetter(0)):
if isinstance(desc, dict) and desc["type"] == "local":
module = importlib.import_module(desc["module"])
device_class = getattr(module, desc["class"])
if device_class in {ttl.TTLOut, ttl.TTLInOut}:
if (desc["module"] == "artiq.coredevice.ttl"
and desc["class"] in {"TTLOut", "TTLInOut"}):
channel = desc["arguments"]["channel"]
channel_handlers[channel] = TTLHandler(vcd_manager, name)
return channel_handlers
@@ -162,12 +174,19 @@ def get_message_time(message):


def messages_to_vcd(filename, devices, messages):
messages = [m for m in messages if get_message_time(m)] # TODO: remove this hack
messages = sorted(messages, key=get_message_time)
vcd_manager = VCDManager(filename)
try:
timescale = get_timescale(devices)
if timescale is not None:
vcd_manager.set_timescale_ns(timescale)
else:
logger.warning("unable to determine VCD timescale")

channel_handlers = create_channel_handlers(vcd_manager, devices)

vcd_manager.set_time(0)
messages = [m for m in messages if get_message_time(m)] # TODO: remove this hack
messages = sorted(messages, key=get_message_time)
if messages:
start_time = get_message_time(messages[0])
for message in messages:
2 changes: 1 addition & 1 deletion artiq/coredevice/core.py
Original file line number Diff line number Diff line change
@@ -47,7 +47,7 @@ class Core:
external RTIO clock input instead of using its internal oscillator.
:param comm_device: name of the device used for communications.
"""
def __init__(self, dmgr, ref_period=8*ns, external_clock=False, comm_device="comm"):
def __init__(self, dmgr, ref_period, external_clock=False, comm_device="comm"):
self.ref_period = ref_period
self.external_clock = external_clock
self.comm = dmgr.get(comm_device)