Adding pipstrello target to travis. #141
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mithro
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Nov 19, 2015
Adding pipstrello target to travis.
mithro
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Dec 18, 2018
* litedram changed from 0572006 to da6fc8c
* da6fc8c - README: add Kintex Ultrascale PHY <Florent Kermarrec>
* 8993e8b - core/refresher: fix refresh regression <Florent Kermarrec>
* 83f763f - phy: replace wdly_dqs_taps with half_sys8x_taps (similar to what is implemented on 7-series) <Florent Kermarrec>
* 28b7d32 - phy/kusddrphy: use rdly_dq_bitslip_rst CSR for bitslip reset <Florent Kermarrec>
* 1ece2ca - phy/dfi: set act_n reset value to 1 <Florent Kermarrec>
* litex changed from v0.1-664-g0ade06c0 to v0.1-668-g1c1c1bd1
* 1c1c1bd1 - Merge pull request #141 from mithro/xst-fix <Tim Ansell>
|\
| * 8b2abc7e - Fix `-vlgincdir` for xst. <Tim 'mithro' Ansell>
* f8f3683a - bios/sdram: reduce scans verbosity on ultrascale <Florent Kermarrec>
* efce434a - bios/sdram: use ddrphy_half_sys8x_taps_read() for KUSDDRPHY <Florent Kermarrec>
Full submodule status
--
6def7bc83dfb0338632e06a8b14c93faa6af8879 edid-decode (remotes/origin/HEAD)
a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (heads/master)
da6fc8c39b1376727c0184896ea494557500d645 litedram (remotes/origin/HEAD)
52c23015b052e40600a84ac73227fb5a0f0ce862 liteeth (remotes/origin/HEAD)
b29c3a07bc5e4e7eb8c12b174446b85371ffb3a0 litepcie (remotes/origin/HEAD)
b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (heads/master)
1634fa35bb9f2717ab355ca2e494e1d02fd489ec litescope (heads/master)
0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (heads/master)
0993a4e0422454e522e1d2b491837034b8dcccbe litevideo (remotes/origin/HEAD)
1c1c1bd122224dcd9ae22288c2660b0e70a283a8 litex (v0.1-668-g1c1c1bd1)
37db6bb52532b6d1c6bc8b724c2e8c6a38546c2a migen (0.6.dev-228-g37db6bb)
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