gateware/rtio/analyzer: fix event ordering

m-labs · Dec 19, 2015 · 1638f0f · 1638f0f
1 parent afee03b
commit 1638f0f
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/artiq/gateware/rtio/analyzer.py b/artiq/gateware/rtio/analyzer.py
@@ -214,7 +214,7 @@ def __init__(self, rtio_core, membus, fifo_depth=128):
 
         self.submodules.message_encoder = MessageEncoder(rtio_core)
         self.submodules.converter = stream.Converter(
-            [("data", 256)], [("data", dw)])
+            [("data", 256)], [("data", dw)], reverse=True)
         self.submodules.fifo = stream.SyncFIFO(
             [("data", dw)], fifo_depth, True)
         self.submodules.dma = DMAWriter(membus)