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runtime: use booleans in syscalls
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sbourdeauducq committed Nov 20, 2014
1 parent dfd779c commit 914bdd9
Showing 3 changed files with 7 additions and 7 deletions.
4 changes: 2 additions & 2 deletions artiq/coredevice/gpio.py
Original file line number Diff line number Diff line change
@@ -6,8 +6,8 @@ class GPIOOut(AutoContext):

@kernel
def on(self):
syscall("gpio_set", self.channel, 1)
syscall("gpio_set", self.channel, True)

@kernel
def off(self):
syscall("gpio_set", self.channel, 0)
syscall("gpio_set", self.channel, False)
6 changes: 3 additions & 3 deletions artiq/coredevice/rtio.py
Original file line number Diff line number Diff line change
@@ -20,7 +20,7 @@ def build(self):

@kernel
def _set_oe(self):
syscall("rtio_oe", self.channel, 1)
syscall("rtio_oe", self.channel, True)

@kernel
def set_value(self, t, value):
@@ -96,7 +96,7 @@ class RTIOOut(_RTIOBase):
"""
def build(self):
_RTIOBase.build(self)
self._set_oe(1)
self._set_oe(True)

@kernel
def sync(self):
@@ -146,7 +146,7 @@ class RTIOIn(_RTIOBase):
"""
def build(self):
_RTIOBase.build(self)
self._set_oe(0)
self._set_oe(False)

@kernel
def gate_rising(self, duration):
4 changes: 2 additions & 2 deletions artiq/coredevice/runtime.py
Original file line number Diff line number Diff line change
@@ -12,8 +12,8 @@

_syscalls = {
"rpc": "i+:i",
"gpio_set": "ii:n",
"rtio_oe": "ii:n",
"gpio_set": "ib:n",
"rtio_oe": "ib:n",
"rtio_set": "Iii:n",
"rtio_replace": "Iii:n",
"rtio_sync": "i:n",

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