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Commit a23df42

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author
Sebastien Bourdeauducq
committedMar 12, 2013
Use automatic register naming
·
0.120.1
1 parent a9b7235 commit a23df42

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7 files changed

+32
-36
lines changed

7 files changed

+32
-36
lines changed
 

‎milkymist/asmiprobe/__init__.py

+4-6
Original file line numberDiff line numberDiff line change
@@ -9,12 +9,10 @@ def __init__(self, hub, trace_depth=16):
99
assert(trace_depth < 256)
1010
assert(slot_count < 256)
1111

12-
self._slot_count = RegisterField("slot_count", 8, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
13-
self._trace_depth = RegisterField("trace_depth", 8, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
14-
self._slot_status = [RegisterField("slot_status" + str(i), 2, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
15-
for i in range(slot_count)]
16-
self._trace = [RegisterField("trace" + str(i), 8, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
17-
for i in range(trace_depth)]
12+
self._slot_count = RegisterField(8, READ_ONLY, WRITE_ONLY)
13+
self._trace_depth = RegisterField(8, READ_ONLY, WRITE_ONLY)
14+
self._slot_status = [RegisterField(2, READ_ONLY, WRITE_ONLY, name="slot_status" + str(i)) for i in range(slot_count)]
15+
self._trace = [RegisterField(8, READ_ONLY, WRITE_ONLY, name="trace" + str(i)) for i in range(trace_depth)]
1816

1917
###
2018

‎milkymist/dfii/__init__.py

+15-16
Original file line numberDiff line numberDiff line change
@@ -5,21 +5,20 @@
55

66
class PhaseInjector(Module, AutoReg):
77
def __init__(self, phase):
8-
self._cs = Field("cs", 1, WRITE_ONLY, READ_ONLY)
9-
self._we = Field("we", 1, WRITE_ONLY, READ_ONLY)
10-
self._cas = Field("cas", 1, WRITE_ONLY, READ_ONLY)
11-
self._ras = Field("ras", 1, WRITE_ONLY, READ_ONLY)
12-
self._wren = Field("wren", 1, WRITE_ONLY, READ_ONLY)
13-
self._rden = Field("rden", 1, WRITE_ONLY, READ_ONLY)
14-
self._command = RegisterFields("command",
15-
[self._cs, self._we, self._cas, self._ras, self._wren, self._rden])
16-
self._command_issue = RegisterRaw("command_issue")
8+
self._cs = Field(1, WRITE_ONLY, READ_ONLY)
9+
self._we = Field(1, WRITE_ONLY, READ_ONLY)
10+
self._cas = Field(1, WRITE_ONLY, READ_ONLY)
11+
self._ras = Field(1, WRITE_ONLY, READ_ONLY)
12+
self._wren = Field(1, WRITE_ONLY, READ_ONLY)
13+
self._rden = Field(1, WRITE_ONLY, READ_ONLY)
14+
self._command = RegisterFields(self._cs, self._we, self._cas, self._ras, self._wren, self._rden)
15+
self._command_issue = RegisterRaw()
1716

18-
self._address = RegisterField("address", len(phase.address))
19-
self._baddress = RegisterField("baddress", len(phase.bank))
17+
self._address = RegisterField(len(phase.address))
18+
self._baddress = RegisterField(len(phase.bank))
2019

21-
self._wrdata = RegisterField("wrdata", len(phase.wrdata))
22-
self._rddata = RegisterField("rddata", len(phase.rddata), READ_ONLY, WRITE_ONLY)
20+
self._wrdata = RegisterField(len(phase.wrdata))
21+
self._rddata = RegisterField(len(phase.rddata), READ_ONLY, WRITE_ONLY)
2322

2423
###
2524

@@ -50,9 +49,9 @@ def __init__(self, a, ba, d, nphases=1):
5049
self.slave = dfi.Interface(a, ba, d, nphases)
5150
self.master = dfi.Interface(a, ba, d, nphases)
5251

53-
self._sel = Field("sel")
54-
self._cke = Field("cke")
55-
self._control = RegisterFields("control", [self._sel, self._cke])
52+
self._sel = Field()
53+
self._cke = Field()
54+
self._control = RegisterFields(self._sel, self._cke)
5655

5756
for n, phase in enumerate(inti.phases):
5857
setattr(self.submodules, "pi" + str(n), PhaseInjector(phase))

‎milkymist/framebuffer/__init__.py

-1
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,6 @@
66
from migen.flow.transactions import *
77
from migen.flow import plumbing
88
from migen.actorlib import misc, dma_asmi, structuring, sim, spi
9-
from migen.bank.description import *
109

1110
_hbits = 11
1211
_vbits = 11

‎milkymist/identifier/__init__.py

+3-3
Original file line numberDiff line numberDiff line change
@@ -17,9 +17,9 @@ def encode_version(version):
1717

1818
class Identifier(Module, AutoReg):
1919
def __init__(self, sysid, version, frequency):
20-
self._r_sysid = RegisterField("sysid", 16, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
21-
self._r_version = RegisterField("version", 16, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
22-
self._r_frequency = RegisterField("frequency", 32, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
20+
self._r_sysid = RegisterField(16, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
21+
self._r_version = RegisterField(16, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
22+
self._r_frequency = RegisterField(32, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
2323

2424
###
2525

‎milkymist/minimac3/__init__.py

+5-5
Original file line numberDiff line numberDiff line change
@@ -23,11 +23,11 @@ def __init__(self):
2323
self.phy_rst_n = Signal()
2424

2525
# CPU interface
26-
self._phy_reset = RegisterField("phy_reset", reset=1)
27-
self._rx_count_0 = RegisterField("rx_count_0", _count_width, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
28-
self._rx_count_1 = RegisterField("rx_count_1", _count_width, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
29-
self._tx_count = RegisterField("tx_count", _count_width, access_dev=READ_WRITE)
30-
self._tx_start = RegisterRaw("tx_start")
26+
self._phy_reset = RegisterField(reset=1)
27+
self._rx_count_0 = RegisterField(_count_width, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
28+
self._rx_count_1 = RegisterField(_count_width, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
29+
self._tx_count = RegisterField(_count_width, access_dev=READ_WRITE)
30+
self._tx_start = RegisterRaw()
3131

3232
self.submodules.ev = EventManager()
3333
self.ev.rx0 = EventSourcePulse()

‎milkymist/timer/__init__.py

+3-3
Original file line numberDiff line numberDiff line change
@@ -5,9 +5,9 @@
55

66
class Timer(Module, AutoReg):
77
def __init__(self, width=32):
8-
self._en = RegisterField("en")
9-
self._value = RegisterField("value", width, access_dev=READ_WRITE)
10-
self._reload = RegisterField("reload", width)
8+
self._en = RegisterField()
9+
self._value = RegisterField(width, access_dev=READ_WRITE)
10+
self._reload = RegisterField(width)
1111

1212
self.submodules.ev = EventManager()
1313
self.ev.zero = EventSourceLevel()

‎milkymist/uart/__init__.py

+2-2
Original file line numberDiff line numberDiff line change
@@ -6,8 +6,8 @@
66

77
class UART(Module, AutoReg):
88
def __init__(self, clk_freq, baud=115200):
9-
self._rxtx = RegisterRaw("rxtx", 8)
10-
self._divisor = RegisterField("divisor", 16, reset=int(clk_freq/baud/16))
9+
self._rxtx = RegisterRaw(8)
10+
self._divisor = RegisterField(16, reset=int(clk_freq/baud/16))
1111

1212
self.submodules.ev = EventManager()
1313
self.ev.tx = EventSourceLevel()

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