memtest: LFSR

m-labs · Jul 10, 2013 · a7a7cc0 · a7a7cc0
1 parent 26ff6f2
commit a7a7cc0
Showing 1 changed file with 30 additions and 0 deletions.
diff --git a/milkymist/memtest/__init__.py b/milkymist/memtest/__init__.py
@@ -0,0 +1,30 @@
+from migen.fhdl.std import *
+from migen.genlib.misc import optree
+from migen.fhdl import verilog
+
+class LFSR(Module):
+	def __init__(self, n_out, n_state=31, taps=[27, 30]):
+		self.ce = Signal()
+		self.o = Signal(n_out)
+
+		###
+
+		state = Signal(n_state)
+		curval = [state[i] for i in range(n_state)]
+		curval += [0]*(n_out - n_state)
+		for i in range(n_out):
+			nv = optree("^", [curval[tap] for tap in taps])
+			curval.insert(0, nv)
+			curval.pop()
+
+		self.sync += If(self.ce,
+				state.eq(Cat(*curval[:n_state])),
+				self.o.eq(Cat(*curval))
+			)
+
+def _printcode():
+	dut = LFSR(3, 4, [3, 2])
+	print(verilog.convert(dut, ios={dut.ce, dut.o}))
+
+if __name__ == "__main__":
+	_printcode()