tb/asmicon_wb: better access pattern

m-labs · May 1, 2012 · 2ccdade · 2ccdade
1 parent 87ee4ba
commit 2ccdade
Showing 1 changed file with 10 additions and 1 deletion.
diff --git a/tb/asmicon/asmicon_wb.py b/tb/asmicon/asmicon_wb.py
@@ -10,9 +10,18 @@
 l2_size = 8192 # in bytes
 
 def my_generator():
-	for x in range(100):
+	for x in range(20):
+		t = TWrite(x, x)
+		yield t
+		print(str(t) + " delay=" + str(t.latency))
+	for x in range(20):
 		t = TRead(x)
 		yield t
+		print(str(t) + " delay=" + str(t.latency))
+	for x in range(20):
+		t = TRead(x+l2_size//4)
+		yield t
+		print(str(t) + " delay=" + str(t.latency))
 
 def main():
 	controller = ASMIcon(sdram_phy, sdram_geom, sdram_timing)