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Commit b38818e

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author
Sebastien Bourdeauducq
committedMar 19, 2013
examples/sim/fir: convert to new API
1 parent 17f2b17 commit b38818e

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‎examples/sim/fir.py

+12-16
Original file line numberDiff line numberDiff line change
@@ -9,37 +9,35 @@
99
from migen.fhdl.module import Module
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from migen.fhdl import verilog
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from migen.genlib.misc import optree
12-
from migen.fhdl import autofragment
1312
from migen.sim.generic import Simulator
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1514
# A synthesizable FIR filter.
16-
class FIR:
15+
class FIR(Module):
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def __init__(self, coef, wsize=16):
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self.coef = coef
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self.wsize = wsize
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self.i = Signal((self.wsize, True))
2120
self.o = Signal((self.wsize, True))
2221

23-
def get_fragment(self):
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###
23+
2424
muls = []
25-
sync = []
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src = self.i
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for c in self.coef:
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sreg = Signal((self.wsize, True))
29-
sync.append(sreg.eq(src))
28+
self.sync += sreg.eq(src)
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src = sreg
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c_fp = int(c*2**(self.wsize - 1))
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muls.append(c_fp*sreg)
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sum_full = Signal((2*self.wsize-1, True))
34-
sync.append(sum_full.eq(optree("+", muls)))
35-
comb = [self.o.eq(sum_full[self.wsize-1:])]
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return Fragment(comb, sync)
33+
self.sync += sum_full.eq(optree("+", muls))
34+
self.comb += self.o.eq(sum_full[self.wsize-1:])
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# A test bench for our FIR filter.
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# Generates a sine wave at the input and records the output.
4038
class TB(Module):
41-
def __init__(self, fir, frequency):
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self.fir = fir
39+
def __init__(self, coef, frequency):
40+
self.submodules.fir = FIR(coef)
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self.frequency = frequency
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self.inputs = []
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self.outputs = []
@@ -54,16 +52,14 @@ def do_simulation(self, s):
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def main():
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# Compute filter coefficients with SciPy.
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coef = signal.remez(30, [0, 0.1, 0.2, 0.4, 0.45, 0.5], [0, 1, 0])
57-
fir = FIR(coef)
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# Simulate for different frequencies and concatenate
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# the results.
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in_signals = []
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out_signals = []
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for frequency in [0.05, 0.1, 0.25]:
64-
tb = TB(fir, frequency)
65-
fragment = autofragment.from_local()
66-
sim = Simulator(fragment)
61+
tb = TB(coef, frequency)
62+
sim = Simulator(tb)
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sim.run(200)
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del sim
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in_signals += tb.inputs
@@ -75,7 +71,7 @@ def main():
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plt.show()
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# Print the Verilog source for the filter.
78-
print(verilog.convert(fir.get_fragment(),
79-
ios={fir.i, fir.o}))
74+
fir = FIR(coef)
75+
print(verilog.convert(fir, ios={fir.i, fir.o}))
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8177
main()

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