Skip to content

Commit

Permalink
mibuild/xilinx: remove obsolete CRG_DS
Browse files Browse the repository at this point in the history
sbourdeauducq committed Mar 13, 2015
1 parent 6a979a8 commit d34b7d7
Showing 1 changed file with 0 additions and 16 deletions.
16 changes: 0 additions & 16 deletions mibuild/xilinx/common.py
Original file line number Diff line number Diff line change
@@ -29,22 +29,6 @@ def settings(path, ver=None, sub=None):

raise OSError("no settings file found")

class CRG_DS(Module):
def __init__(self, platform, clk_name, rst_name, rst_invert=False):
reset_less = rst_name is None
self.clock_domains.cd_sys = ClockDomain(reset_less=reset_less)
self._clk = platform.request(clk_name)
self.specials += Instance("IBUFGDS",
Instance.Input("I", self._clk.p),
Instance.Input("IB", self._clk.n),
Instance.Output("O", self.cd_sys.clk)
)
if not reset_less:
if rst_invert:
self.comb += self.cd_sys.rst.eq(~platform.request(rst_name))
else:
self.comb += self.cd_sys.rst.eq(platform.request(rst_name))

class XilinxNoRetimingImpl(Module):
def __init__(self, reg):
self.specials += SynthesisDirective("attribute register_balancing of {r} is no", r=reg)

0 comments on commit d34b7d7

Please sign in to comment.