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base repository: m-labs/misoc
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head repository: m-labs/misoc
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- 3 commits
- 4 files changed
- 1 contributor
Commits on Mar 12, 2015
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uart/liteeth: only import the phy we are going to use (UARTPHYSim can…
…not be imported on Windows since based on pty).
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soc/sdram: add workaround for Vivado issue with our L2 cache, reporte…
…d to Xilinx in november 2014, remove it when fixed by Xilinx
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targets/simple: insert IBUFDS for Xilinx devices (not implemented for…
… others vendors)
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