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base repository: m-labs/migen
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head repository: m-labs/migen
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compare: 15e24b6c1061
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- 4 commits
- 6 files changed
- 1 contributor
Commits on Mar 30, 2015
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migen: create VerilogConvert and EDIFConvert classes and return it wi…
…th convert functions
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migen/fhdl/specials: use fdict to pass memory initialization files to…
… VerilogConvert and print them in __str__ method
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