m-labs · Mar 30, 2015 · Mar 30, 2015
diff --git a/.travis.yml b/.travis.yml
@@ -8,28 +8,27 @@ env:
     - CC=gcc-4.7
     - CXX=g++-4.7
     - ARTIQ_NO_HARDWARE=1
-    - BUILD_SOC=0
+    - BUILD_SOC=1
     - secure: "DUk/Ihg8KbbzEgPF0qrHqlxU8e8eET9i/BtzNvFddIGX4HP/P2qz0nk3cVkmjuWhqJXSbC22RdKME9qqPzw6fJwJ6dpJ3OR6dDmSd7rewavq+niwxu52PVa+yK8mL4yf1terM7QQ5tIRf+yUL9qGKrZ2xyvEuRit6d4cFep43Ws="
 before_install:
-  - if echo "$TRAVIS_COMMIT_MSG" | grep -q "\[soc\]"; then BUILD_SOC=1; fi
   - if [ $TRAVIS_PULL_REQUEST != false ]; then BUILD_SOC=0; fi
   - ./.travis/get-toolchain.sh
   - if [ $BUILD_SOC -ne 0 ]; then ./.travis/get-xilinx.sh; fi
-  - ./.travis/get-anaconda.sh pip coverage numpy scipy sphinx h5py pyserial dateutil
+  - ./.travis/get-anaconda.sh pip coverage binstar
   - source $HOME/miniconda/bin/activate py34
-  - ./.travis/get-misoc.sh
-  - pip install --src . -e 'git+https://github.com/nist-ionstorage/llvmlite.git@artiq#egg=llvmlite'
+  - sudo apt-get install --force-yes -y iverilog
   - pip install coveralls
+  - conda install migen
 install:
-  - pip install -e .
+  - conda build conda/artiq
+  - conda install $HOME/miniconda/conda-bld/linux-64/artiq-*.tar.bz2
 script:
   - coverage run --source=artiq setup.py test
   - make -C doc/manual html
-  - cd misoc; python make.py -X ../soc -t artiq_ppro build-headers build-bios; cd ..
-  - make -C soc/runtime
-  - if [ $BUILD_SOC -ne 0 ]; then cd misoc; python make.py -X ../soc -t artiq_ppro build-bitstream; cd ..; fi
 after_success:
-  coveralls
+  - binstar login --hostname $(hostname) --username $binstar_login --password $binstar_password
+  - binstar upload --user $binstar_login --channel dev --force $HOME/miniconda/conda-bld/linux-64/artiq-*.tar.bz2
+  - coveralls
 notifications:
   email: false
   irc:

diff --git a/.travis/get-anaconda.sh b/.travis/get-anaconda.sh
@@ -5,5 +5,7 @@ bash miniconda.sh -b -p $HOME/miniconda
 hash -r
 conda config --set always_yes yes --set changeps1 no
 conda update -q conda
+conda install conda-build jinja2
 conda info -a
 conda create -q -n py34 python=$TRAVIS_PYTHON_VERSION $@
+conda config --add channels fallen
diff --git a/.travis/get-misoc.sh b/.travis/get-misoc.sh
diff --git a/artiq/frontend/artiq_flash.sh b/artiq/frontend/artiq_flash.sh
@@ -0,0 +1,75 @@
+#!/bin/bash
+
+ARTIQ_PREFIX=$(python3 -c "import artiq; print(artiq.__path__[0])")
+BIN_PREFIX=$ARTIQ_PREFIX/binaries
+
+while getopts "bBrh" opt
+do
+	case $opt in
+		b)
+			FLASH_BITSTREAM=1
+			;;
+		B)
+			FLASH_BIOS=1
+			;;
+		r)
+			FLASH_RUNTIME=1
+			;;
+		*)
+			echo "ARTIQ flashing tool"
+			echo ""
+			echo "To flash everything, do not use any command line option."
+			echo ""
+			echo "usage: $0 [-b] [-B] [-r] [-h]"
+			echo "-b  Flash bitstream"
+			echo "-B  Flash BIOS"
+			echo "-r  Flash ARTIQ runtime"
+			echo "-h  Show this help message"
+			exit 1
+			;;
+	esac
+done
+
+if [ -z $@ ]
+then
+	FLASH_RUNTIME=1
+	FLASH_BIOS=1
+	FLASH_BITSTREAM=1
+fi
+
+check_return() {
+	echo "Flashing failed, you may want to re-run the flashing tool."
+	exit
+}
+
+xc3sprog -c papilio -R 2&>1 > /dev/null
+if [ "$?" != "0" ]
+then
+		echo "Flashing failed because it seems you do not have permission to access the USB device."
+		echo "To fix this you might want to add a udev rule by doing:"
+		echo "$ sudo cp $ARTIQ_PREFIX/misc/99-ppro.rules /etc/udev/rules.d"
+		echo "Then unplug/replug your device and try flashing again"
+		exit
+fi
+
+trap check_return ERR
+
+if [ "${FLASH_BITSTREAM}" == "1" ]
+then
+	echo "Flashing FPGA bitstream..."
+	xc3sprog -v -c papilio -I$BIN_PREFIX/bscan_spi_lx9_papilio.bit $BIN_PREFIX/artiqminisoc-papilio_pro.bin:w:0x0:BIN
+fi
+
+if [ "${FLASH_BIOS}" == "1" ]
+then
+	echo "Flashing BIOS..."
+	xc3sprog -v -c papilio -I$BIN_PREFIX/bscan_spi_lx9_papilio.bit $BIN_PREFIX/bios.bin:w:0x60000:BIN
+fi
+
+if [ "${FLASH_RUNTIME}" == "1" ]
+then
+	echo "Flashing ARTIQ runtime..."
+	xc3sprog -v -c papilio -I$BIN_PREFIX/bscan_spi_lx9_papilio.bit $BIN_PREFIX/runtime.fbi:w:0x70000:BIN
+fi
+echo "Done."
+xc3sprog -v -c papilio -R 2&>1 > /dev/null
diff --git a/conda/artiq/build.sh b/conda/artiq/build.sh
@@ -1,3 +1,19 @@
 #!/bin/bash
 
 ARTIQ_GUI=1 $PYTHON setup.py install --single-version-externally-managed --record=record.txt
+git clone --recursive https://github.com/m-labs/misoc
+git clone https://github.com/GadgetFactory/Papilio-Loader
+export MSCDIR=$SRC_DIR/misoc
+cd $SRC_DIR/misoc; python make.py -X ../soc -t artiq_ppro build-headers build-bios; cd -
+make -C soc/runtime runtime.fbi
+cd $SRC_DIR/misoc; python make.py -X $SRC_DIR/soc -t  artiq_ppro build-bitstream; cd -
+ARTIQ_PREFIX=$PREFIX/lib/python3.4/site-packages/artiq
+BIN_PREFIX=$ARTIQ_PREFIX/binaries
+mkdir -p $ARTIQ_PREFIX/misc
+cp misc/99-ppro.rules $ARTIQ_PREFIX/misc/
+mkdir -p $BIN_PREFIX
+cp $SRC_DIR/misoc/build/artiqminisoc-papilio_pro.bin $BIN_PREFIX/
+cp $SRC_DIR/misoc/software/bios/bios.bin $BIN_PREFIX/
+cp soc/runtime/runtime.fbi $BIN_PREFIX/
+cp artiq/frontend/artiq_flash.sh $PREFIX/bin
+cp Papilio-Loader/xc3sprog/trunk/bscan_spi/bscan_spi_lx9_papilio.bit $BIN_PREFIX/
diff --git a/conda/artiq/meta.yaml b/conda/artiq/meta.yaml
@@ -1,14 +1,13 @@
 package:
     name: artiq
-    version: "0.0"
+    version: {{ environ.get("GIT_DESCRIBE_TAG", "") }}
 
 source:
     git_url: https://github.com/m-labs/artiq
     git_tag: master
 
 build:
-    number: 4
-    string: dev
+    number: {{ environ.get("GIT_DESCRIBE_NUMBER", 0) }}
     entry_points:
         - artiq_client = artiq.frontend.artiq_client:main
         - artiq_gui = artiq.frontend.artiq_gui:main # [not win]
@@ -24,6 +23,7 @@ requirements:
         - python
         - setuptools
         - numpy
+        - migen
     run:
         - python
         - llvmlite-or1k
@@ -32,6 +32,7 @@ requirements:
         - prettytable
         - pyserial
         - sphinx
+        - sphinx-argparse
         - h5py
         - dateutil
         - gbulb-artiq # [not win]

diff --git a/misc/99-ppro.rules b/misc/99-ppro.rules
@@ -0,0 +1 @@
+SUBSYSTEM=="usb", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", MODE="0666"
diff --git a/soc/targets/artiq_ppro.py b/soc/targets/artiq_ppro.py
@@ -111,7 +111,7 @@ def __init__(self, platform, cpu_type="or1k",
             platform.request("ttl_h_tx_en").eq(1)
         ]
         rtio_ins = [platform.request("pmt") for i in range(2)]
-        rtio_outs = [platform.request("ttl", i) for i in range(6)] + [fud]
+        rtio_outs = [platform.request("ttl", i) for i in range(5)] + [fud]
 
         self.submodules.rtiocrg = _RTIOMiniCRG(platform)
         self.submodules.rtiophy = rtio.phy.SimplePHY(
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1 @@
		SUBSYSTEM=="usb", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", MODE="0666"