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base repository: m-labs/misoc
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- 3 commits
- 1 file changed
- 1 contributor
Commits on Mar 27, 2015
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software/bios/sdram: add random addressing to memtest
testing memories with linear access is not good enough. Adding random addressing allow us to detect more eventual issues on our L2 cache or SDRAM controller.
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software/bios/sdram: for now desactivate random on address test since…
… it seems to trigger a L2 cache or LASMIcon bug on at least de0nano/minispartan6 Memtest sometimes reports 1 or 2 errors with de0nano/minispartan6 on this new test when used with LASMICON. Minicon seems fine. We will have to investigate on this issue.
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