Skip to content

Commit

Permalink
mibuild/platforms/versa: add ethernet clock constraints
Browse files Browse the repository at this point in the history
enjoy-digital committed Mar 17, 2015
1 parent ba2aeb0 commit c06ab82
Showing 1 changed file with 9 additions and 2 deletions.
11 changes: 9 additions & 2 deletions mibuild/platforms/versa.py
Original file line number Diff line number Diff line change
@@ -7,7 +7,7 @@

_io = [
("clk100", 0, Pins("L5"), IOStandard("LVDS25")),
("rst_n", 0, Pins("A21"),IOStandard("LVCMOS33")),
("rst_n", 0, Pins("A21"), IOStandard("LVCMOS33")),

("user_led", 0, Pins("Y20"), IOStandard("LVCMOS33")),
("user_led", 1, Pins("AA21"), IOStandard("LVCMOS33")),
@@ -79,6 +79,13 @@ class Platform(LatticePlatform):

def __init__(self):
LatticePlatform.__init__(self, "LFE3-35EA-6FN484C", _io)

try:

This comment has been minimized.

Copy link
@sbourdeauducq

sbourdeauducq Mar 18, 2015

Member

Shouldn't that be in finalize?

This comment has been minimized.

Copy link
@enjoy-digital

enjoy-digital Mar 18, 2015

Author Contributor

Yes thanks I've fixed that here:
500e58c

self.add_period_constraint(self.lookup_request("eth_clocks", 0).rx, 8.0)
except ConstraintError:
pass
try:
self.add_period_constraint(self.lookup_request("eth_clocks", 1).rx, 8.0)
except ConstraintError:
pass
def create_programmer(self):
return LatticeProgrammer()

0 comments on commit c06ab82

Please sign in to comment.