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base repository: m-labs/misoc
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head repository: m-labs/misoc
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compare: 210e473b5d11
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  • 2 commits
  • 1 file changed
  • 1 contributor

Commits on Jul 1, 2012

  1. framebuffer: indentation

    Sebastien Bourdeauducq committed Jul 1, 2012
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    59289cf View commit details

Commits on Jul 3, 2012

  1. framebuffer: fix computation of alignment bits

    Sebastien Bourdeauducq committed Jul 3, 2012
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    210e473 View commit details
Showing with 15 additions and 14 deletions.
  1. +15 −14 milkymist/framebuffer/__init__.py
29 changes: 15 additions & 14 deletions milkymist/framebuffer/__init__.py
View file
Original file line number Diff line number Diff line change
@@ -187,19 +187,20 @@ def get_fragment(self):
],
clkport="clk_write")
t = self.token("dac")
return Fragment([
asfifo.ins["read_en"].eq(1),

self.endpoints["dac"].ack.eq(~asfifo.outs["full"]),
asfifo.ins["write_en"].eq(self.endpoints["dac"].stb),
asfifo.ins["data_in"].eq(Cat(~t.hsync, ~t.vsync, t.r, t.g, t.b)),

self.busy.eq(0),
asfifo.ins["rst"].eq(0)
], [
Cat(self.vga_hsync_n, self.vga_vsync_n, self.vga_r, self.vga_g, self.vga_b).eq(asfifo.outs["data_out"])
],
instances=[asfifo])
return Fragment(
[
asfifo.ins["read_en"].eq(1),

self.endpoints["dac"].ack.eq(~asfifo.outs["full"]),
asfifo.ins["write_en"].eq(self.endpoints["dac"].stb),
asfifo.ins["data_in"].eq(Cat(~t.hsync, ~t.vsync, t.r, t.g, t.b)),

self.busy.eq(0),
asfifo.ins["rst"].eq(0)
], [
Cat(self.vga_hsync_n, self.vga_vsync_n, self.vga_r, self.vga_g, self.vga_b).eq(asfifo.outs["data_out"])
],
instances=[asfifo])

class FakeDMA(Actor):
def __init__(self, port):
@@ -223,7 +224,7 @@ def get_fragment(self):
class Framebuffer:
def __init__(self, address, asmiport):
asmi_bits = asmiport.hub.aw
alignment_bits = bits_for(asmiport.hub.dw//8)
alignment_bits = bits_for(asmiport.hub.dw//8) - 1
length_bits = _hbits + _vbits + 2 - alignment_bits
pack_factor = asmiport.hub.dw//_bpp
packed_pixels = structuring.pack_layout(_pixel_layout, pack_factor)