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Commit b124a98

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committedAug 6, 2014
genlib: add reset synchronizer
1 parent 4d38232 commit b124a98

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2 files changed

+37
-2
lines changed

2 files changed

+37
-2
lines changed
 

‎mibuild/xilinx_common.py

+19-2
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
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from migen.fhdl.std import *
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from migen.fhdl.specials import SynthesisDirective
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from migen.genlib.cdc import *
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from migen.genlib.resetsync import AsyncResetSynchronizer
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from mibuild.generic_platform import GenericPlatform
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from mibuild import tools
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@@ -66,13 +67,29 @@ class XilinxMultiReg:
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def lower(dr):
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return XilinxMultiRegImpl(dr.i, dr.o, dr.odomain, dr.n)
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70+
class XilinxAsyncResetSynchronizerImpl(Module):
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def __init__(self, cd, async_reset):
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rst1 = Signal()
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self.specials += [
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Instance("FDPE", p_INIT=1, i_D=0, i_PRE=async_reset,
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i_C=cd.clk, o_Q=rst1),
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Instance("FDPE", p_INIT=1, i_D=rst1, i_PRE=async_reset,
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i_C=cd.clk, o_Q=cd.rst)
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]
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class XilinxAsyncResetSynchronizer:
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staticmethod
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def lower(dr):
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return XilinxAsyncResetSynchronizerImpl(dr.cd, dr.async_reset)
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class XilinxGenericPlatform(GenericPlatform):
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bitstream_ext = ".bit"
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def get_verilog(self, *args, special_overrides=dict(), **kwargs):
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so = {
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NoRetiming: XilinxNoRetiming,
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MultiReg: XilinxMultiReg
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NoRetiming: XilinxNoRetiming,
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MultiReg: XilinxMultiReg,
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AsyncResetSynchronizer: XilinxAsyncResetSynchronizer
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}
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so.update(special_overrides)
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return GenericPlatform.get_verilog(self, *args, special_overrides=so, **kwargs)

‎migen/genlib/resetsync.py

+18
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
from migen.fhdl.std import *
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from migen.fhdl.specials import Special
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from migen.fhdl.tools import list_signals
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class AsyncResetSynchronizer(Special):
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def __init__(self, cd, async_reset):
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Special.__init__(self)
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self.cd = cd
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self.async_reset = async_reset
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def iter_expressions(self):
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yield self.cd, "clk", SPECIAL_INPUT
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yield self.cd, "rst", SPECIAL_OUTPUT
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yield self, "async_reset", SPECIAL_INPUT
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@staticmethod
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def lower(dr):
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raise NotImplementedError("Attempted to use a reset synchronizer, but platform does not support them")

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