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base repository: m-labs/migen
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head repository: m-labs/migen
compare: 14b1da401838
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  • 2 commits
  • 2 files changed
  • 1 contributor

Commits on Mar 21, 2015

  1. sim: keep track of unreferenced items 

    * items that are never referenced in any statements do not end up in the
namespace or in the verilog

* this memorizes items if they can not be found in the namespace and keeps
track of their values
    @jordens @sbourdeauducq
    jordens authored and sbourdeauducq committed Mar 21, 2015
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  2. test_actor: add unittests for SimActor 

    * also implicitly tests for the access of signals during simulation that are
not referenced in any statements

* before, if the busy signal is never used, it is stripped
  and could not be accessed in simulation
    @jordens @sbourdeauducq
    jordens authored and sbourdeauducq committed Mar 21, 2015
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