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base repository: m-labs/migen
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head repository: m-labs/migen
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compare: b3b1209c62b0
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  • 2 commits
  • 1 file changed
  • 1 contributor

Commits on Mar 16, 2015

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    fab0b0b View commit details
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    b3b1209 View commit details
Showing with 49 additions and 0 deletions.
  1. +49 −0 mibuild/platforms/versa.py
49 changes: 49 additions & 0 deletions mibuild/platforms/versa.py
Original file line number Diff line number Diff line change
@@ -17,10 +17,59 @@
("user_led", 6, Pins("AB20"), IOStandard("LVCMOS33")),
("user_led", 7, Pins("AA20"), IOStandard("LVCMOS33")),

("user_dip_btn", 0, Pins("J7"), IOStandard("LVCMOS15")),
("user_dip_btn", 1, Pins("J6"), IOStandard("LVCMOS15")),
("user_dip_btn", 2, Pins("H2"), IOStandard("LVCMOS15")),
("user_dip_btn", 3, Pins("H3"), IOStandard("LVCMOS15")),
("user_dip_btn", 4, Pins("J3"), IOStandard("LVCMOS15")),
("user_dip_btn", 5, Pins("K3"), IOStandard("LVCMOS15")),
("user_dip_btn", 6, Pins("J2"), IOStandard("LVCMOS15")),
("user_dip_btn", 7, Pins("J1"), IOStandard("LVCMOS15")),

("serial", 0,
Subsignal("tx", Pins("B11"), IOStandard("LVCMOS33")), # X4 IO0
Subsignal("rx", Pins("B12"), IOStandard("LVCMOS33")), # X4 IO1
),

("eth_clocks", 0,
Subsignal("tx", Pins("C12")),
Subsignal("gtx", Pins("M2")),
Subsignal("rx", Pins("L4")),
IOStandard("LVCMOS33")
),
("eth", 0,
Subsignal("rst_n", Pins("L3")),
Subsignal("mdio", Pins("L2")),
Subsignal("mdc", Pins("V4")),
Subsignal("dv", Pins("M1")),
Subsignal("rx_er", Pins("M4")),
Subsignal("rx_data", Pins("M5 N1 N6 P6 T2 R2 P5 P3")),
Subsignal("tx_en", Pins("V3")),
Subsignal("tx_data", Pins("V1 U1 R3 P1 N5 N3 N4 N2")),
Subsignal("col", Pins("R1")),
Subsignal("crs", Pins("P4")),
IOStandard("LVCMOS33")
),

("eth_clocks", 1,
Subsignal("tx", Pins("M21")),
Subsignal("gtx", Pins("M19")),
Subsignal("rx", Pins("N19")),
IOStandard("LVCMOS33")
),
("eth", 1,
Subsignal("rst_n", Pins("R21")),
Subsignal("mdio", Pins("U16")),
Subsignal("mdc", Pins("Y18")),
Subsignal("dv", Pins("U15")),
Subsignal("rx_er", Pins("V20")),
Subsignal("rx_data", Pins("AB17 AA17 R19 V21 T17 R18 W21 Y21")),
Subsignal("tx_en", Pins("V22")),
Subsignal("tx_data", Pins("W22 R16 P17 Y22 T21 U22 P20 U20")),
Subsignal("col", Pins("N18")),
Subsignal("crs", Pins("P19")),
IOStandard("LVCMOS33")
),
]

class Platform(LatticePlatform):